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Searched refs:INT_POL0 (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/bridge/analogix/
Danalogix_dp_reg.h284 #define INT_POL0 (0x1 << 0) macro
Danalogix_dp_reg.c101 writel(INT_POL1 | INT_POL0, dp->reg_base + ANALOGIX_DP_INT_CTL); in analogix_dp_init_interrupt()