Searched refs:LCD_SPU_DMA_CTRL1 (Results 1 – 6 of 6) sorted by relevance
61 LCD_SPU_DMA_CTRL1 = 0x0194, enumerator
389 armada_reg_queue_mod(regs, i, val, CFG_VSYNC_INV, LCD_SPU_DMA_CTRL1); in armada_drm_crtc_mode_set_nofb()948 writel_relaxed(0x2032ff81, dcrtc->base + LCD_SPU_DMA_CTRL1); in armada_drm_crtc_create()
210 LCD_SPU_DMA_CTRL1); in armada_drm_overlay_plane_atomic_update()
334 x = readl(fbi->reg_base + LCD_SPU_DMA_CTRL1); in set_dma_control1()344 writel(x, fbi->reg_base + LCD_SPU_DMA_CTRL1); in set_dma_control1()
266 #define LCD_SPU_DMA_CTRL1 0x0194 macro
128 LCD_PN2_CTRL1) : LCD_SPU_DMA_CTRL1)491 #define LCD_SPU_DMA_CTRL1 0x0194 macro