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Searched refs:MC_SEQ_RESERVE_M (Results 1 – 14 of 14) sorted by relevance

/drivers/gpu/drm/radeon/
Dbtcd.h124 #define MC_SEQ_RESERVE_M 0x2a08 macro
Drv6xxd.h214 #define MC_SEQ_RESERVE_M 0x2894 macro
Dnid.h795 #define MC_SEQ_RESERVE_M 0x2a08 macro
Dcypress_dpm.c1022 eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_RESERVE_M >> 2; in cypress_set_mc_reg_address_table()
1023 eg_pi->mc_reg_table.mc_reg_address[i].s1 = MC_SEQ_RESERVE_M >> 2; in cypress_set_mc_reg_address_table()
Dsid.h562 #define MC_SEQ_RESERVE_M 0x2a08 macro
Dcikd.h687 #define MC_SEQ_RESERVE_M 0x2a08 macro
Devergreend.h300 #define MC_SEQ_RESERVE_M 0x2a08 macro
Dbtc_dpm.c1952 case MC_SEQ_RESERVE_M >> 2: in btc_set_mc_special_registers()
Drv6xx_dpm.c789 dram_refresh_rate = 1 << ((RREG32(MC_SEQ_RESERVE_M) & 0x3) + 3); in calculate_memory_refresh_rate()
Dni_dpm.c2749 case MC_SEQ_RESERVE_M >> 2: in ni_set_mc_special_registers()
Dsi_dpm.c5384 case MC_SEQ_RESERVE_M: in si_set_mc_special_registers()
Dci_dpm.c4345 case MC_SEQ_RESERVE_M: in ci_set_mc_special_registers()
/drivers/gpu/drm/amd/amdgpu/
Dsid.h563 #define MC_SEQ_RESERVE_M 0xA82 macro
/drivers/gpu/drm/amd/pm/legacy-dpm/
Dsi_dpm.c5880 case MC_SEQ_RESERVE_M: in si_set_mc_special_registers()