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Searched refs:MC_VM_L1_TLB_MCB_RD_HDP_CNTL (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/radeon/
Dr600.c1154 WREG32(MC_VM_L1_TLB_MCB_RD_HDP_CNTL, tmp | ENABLE_L1_STRICT_ORDERING); in r600_pcie_gart_enable()
1214 WREG32(MC_VM_L1_TLB_MCB_RD_HDP_CNTL, tmp); in r600_pcie_gart_disable()
1246 WREG32(MC_VM_L1_TLB_MCB_RD_HDP_CNTL, tmp | ENABLE_L1_STRICT_ORDERING); in r600_agp_enable()
Dr600d.h354 #define MC_VM_L1_TLB_MCB_RD_HDP_CNTL 0x2204 macro