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Searched refs:MTL_LATENCY_LP4_LP5 (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/i915/display/
Dskl_watermark_regs.h153 #define MTL_LATENCY_LP4_LP5 _MMIO(0x45788) macro
Dskl_watermark.c3351 val = intel_de_read(i915, MTL_LATENCY_LP4_LP5); in mtl_read_wm_latency()