Searched refs:P5 (Results 1 – 4 of 4) sorted by relevance
/drivers/iio/pressure/ |
D | bmp280.h | 334 s16 P5; member 356 u16 P5; member
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D | bmp280-core.c | 115 enum { T1, T2, T3, P1, P2, P3, P4, P5, P6, P7, P8, P9 }; enumerator 206 calib->P5 = le16_to_cpu(data->bmp280_cal_buf[P5]); in bmp280_read_calib() 347 var2 += (var1 * (s64)calib->P5) << 17; in bmp280_compensate_press() 966 offset = ((s64)calib->P5 << 47) + var4 + var5 + var6; in bmp380_compensate_press() 1084 calib->P5 = get_unaligned_le16(&data->bmp380_cal_buf[BMP380_P5]); in bmp380_read_calib()
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/drivers/pinctrl/aspeed/ |
D | pinctrl-aspeed-g4.c | 1555 #define P5 191 macro 1556 SIG_EXPR_LIST_DECL_SINGLE(P5, GPIOX7, GPIOX7, SIG_DESC_SET(SCUA4, 7)); 1557 SIG_EXPR_LIST_DECL_SINGLE(P5, ADC15, ADC15); 1558 PIN_DECL_(P5, SIG_EXPR_LIST_PTR(P5, GPIOX7), SIG_EXPR_LIST_PTR(P5, ADC15)); 1559 FUNC_GROUP_DECL(ADC15, P5); 2082 ASPEED_PINCTRL_PIN(P5), 2522 ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, P5, P5, SCUA8, 19), 2523 ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, P5, P5, SCUA8, 19),
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D | pinctrl-aspeed-g5.c | 784 #define P5 101 macro 786 SIG_EXPR_LIST_DECL_SINGLE(P5, VPIB7, VPI24, VPI_24_RSVD_DESC, P5_DESC, COND2); 787 SIG_EXPR_LIST_DECL_SINGLE(P5, NRTS2, NRTS2, P5_DESC, COND2); 788 PIN_DECL_2(P5, GPIOM5, VPIB7, NRTS2); 789 FUNC_GROUP_DECL(NRTS2, P5); 929 FUNC_GROUP_DECL(VPI24, T1, U2, P4, P3, Y1, AB2, AA1, Y2, AA2, P5, R5, T5, V3, 2075 ASPEED_PINCTRL_PIN(P5),
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