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Searched refs:PLL_MODE_INT (Results 1 – 4 of 4) sorted by relevance

/drivers/clk/nuvoton/
Dclk-ma35d1-pll.c63 #define PLL_MODE_INT 0 macro
111 if (mode == PLL_MODE_INT) { in ma35d1_calc_pll_freq()
135 if (pll->mode == PLL_MODE_INT) { in ma35d1_pll_find_closest()
155 if (pll->mode != PLL_MODE_INT) in ma35d1_pll_find_closest()
201 case PLL_MODE_INT: in ma35d1_clk_pll_set_rate()
202 reg_ctl[0] |= FIELD_PREP(PLL_CTL0_MODE, PLL_MODE_INT); in ma35d1_clk_pll_set_rate()
Dclk-ma35d1.c61 #define PLL_MODE_INT 0 macro
448 pllmode[i] = PLL_MODE_INT; in ma35d1_get_pll_setting()
/drivers/clk/pistachio/
Dclk-pll.c68 PLL_MODE_INT, enumerator
111 return val ? PLL_MODE_INT : PLL_MODE_FRAC; in pll_frac_get_mode()
120 if (mode == PLL_MODE_INT) in pll_frac_set_mode()
261 pll_frac_set_mode(hw, PLL_MODE_INT); in pll_gf40lp_frac_set_rate()
/drivers/clk/zynqmp/
Dpll.c34 PLL_MODE_INT = 0, enumerator
83 mode = PLL_MODE_INT; in zynqmp_pll_set_mode()