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Searched refs:PPSMC_MSG_SetDriverDramAddrLow (Results 1 – 25 of 32) sorted by relevance

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/drivers/gpu/drm/amd/pm/powerplay/smumgr/
Dvega20_smumgr.c185 PPSMC_MSG_SetDriverDramAddrLow, in vega20_copy_table_from_smc()
235 PPSMC_MSG_SetDriverDramAddrLow, in vega20_copy_table_to_smc()
268 PPSMC_MSG_SetDriverDramAddrLow, in vega20_set_activity_monitor_coeff()
298 PPSMC_MSG_SetDriverDramAddrLow, in vega20_get_activity_monitor_coeff()
409 PPSMC_MSG_SetDriverDramAddrLow, in vega20_set_pptable_driver_address()
Dsmu10_smumgr.c134 PPSMC_MSG_SetDriverDramAddrLow, in smu10_copy_table_from_smc()
174 PPSMC_MSG_SetDriverDramAddrLow, in smu10_copy_table_to_smc()
Dvega10_smumgr.c55 PPSMC_MSG_SetDriverDramAddrLow, in vega10_copy_table_from_smc()
100 PPSMC_MSG_SetDriverDramAddrLow, in vega10_copy_table_to_smc()
Dvega12_smumgr.c59 PPSMC_MSG_SetDriverDramAddrLow, in vega12_copy_table_from_smc()
110 PPSMC_MSG_SetDriverDramAddrLow, in vega12_copy_table_to_smc()
/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/
Dsmu_v13_0_5_ppsmc.h47 #define PPSMC_MSG_SetDriverDramAddrLow 12 ///< Set low 32 bits of DRAM address for Driver tabl… macro
Dsmu_v13_0_1_ppsmc.h58 #define PPSMC_MSG_SetDriverDramAddrLow 0x0E ///< Set low 32 bits of DRAM address for Drive… macro
Dsmu_v13_0_4_ppsmc.h67 #define PPSMC_MSG_SetDriverDramAddrLow 0x0E ///< Set low 32 bits of DRAM address for Drive… macro
Dsmu_v12_0_ppsmc.h60 #define PPSMC_MSG_SetDriverDramAddrLow 0x1B macro
Darcturus_ppsmc.h52 #define PPSMC_MSG_SetDriverDramAddrLow 0xF macro
Dsmu_v13_0_6_ppsmc.h47 #define PPSMC_MSG_SetDriverDramAddrLow 0xE macro
Dsmu_v11_0_7_ppsmc.h52 #define PPSMC_MSG_SetDriverDramAddrLow 0xF macro
Dsmu_v13_0_7_ppsmc.h51 #define PPSMC_MSG_SetDriverDramAddrLow 0xF macro
Dsmu_v11_0_ppsmc.h50 #define PPSMC_MSG_SetDriverDramAddrLow 0xF macro
Dsmu_v13_0_0_ppsmc.h53 #define PPSMC_MSG_SetDriverDramAddrLow 0xF macro
Dsmu_v11_5_ppsmc.h51 #define PPSMC_MSG_SetDriverDramAddrLow 0x11 macro
Daldebaran_ppsmc.h52 #define PPSMC_MSG_SetDriverDramAddrLow 0x10 macro
/drivers/gpu/drm/amd/pm/powerplay/inc/
Drv_ppsmc.h59 #define PPSMC_MSG_SetDriverDramAddrLow 0x1B macro
Dvega12_ppsmc.h54 #define PPSMC_MSG_SetDriverDramAddrLow 0x11 macro
Dvega20_ppsmc.h53 #define PPSMC_MSG_SetDriverDramAddrLow 0x11 macro
Dvega10_ppsmc.h50 #define PPSMC_MSG_SetDriverDramAddrLow 0xA macro
/drivers/gpu/drm/amd/pm/swsmu/smu13/
Dsmu_v13_0_5_ppt.c76 MSG_MAP(SetDriverDramAddrLow, PPSMC_MSG_SetDriverDramAddrLow, 1),
Dsmu_v13_0_4_ppt.c85 MSG_MAP(SetDriverDramAddrLow, PPSMC_MSG_SetDriverDramAddrLow, 1),
Dyellow_carp_ppt.c82 MSG_MAP(SetDriverDramAddrLow, PPSMC_MSG_SetDriverDramAddrLow, 1),
Daldebaran_ppt.c111 MSG_MAP(SetDriverDramAddrLow, PPSMC_MSG_SetDriverDramAddrLow, 1),
/drivers/gpu/drm/amd/pm/swsmu/smu12/
Drenoir_ppt.c76 MSG_MAP(SetDriverDramAddrLow, PPSMC_MSG_SetDriverDramAddrLow, 1),

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