Home
last modified time | relevance | path

Searched refs:PP_SEQUENCE_STATE_ON_IDLE (Results 1 – 4 of 4) sorted by relevance

/drivers/gpu/drm/i915/display/
Dintel_pps_regs.h41 #define PP_SEQUENCE_STATE_ON_IDLE REG_FIELD_PREP(PP_SEQUENCE_STATE_MASK, 0x8) macro
Dintel_pps.c576 …efine IDLE_ON_VALUE (PP_ON | PP_SEQUENCE_NONE | 0 | PP_SEQUENCE_STATE_ON_IDLE)
/drivers/gpu/drm/gma500/
Dpsb_intel_reg.h165 #define PP_SEQUENCE_STATE_ON_IDLE (1 << 3) macro
/drivers/gpu/drm/i915/gvt/
Dhandlers.c379 vgpu_vreg_t(vgpu, PCH_PP_STATUS) |= PP_SEQUENCE_STATE_ON_IDLE; in pch_pp_control_mmio_write()