Searched refs:QSERDES_COM_PLL_CCTRL_MODE0 (Results 1 – 6 of 6) sorted by relevance
/drivers/phy/qualcomm/ |
D | phy-qcom-sgmii-eth.c | 29 #define QSERDES_COM_PLL_CCTRL_MODE0 (QSERDES_QMP_PLL + 0x84) macro 121 regmap_write(regmap, QSERDES_COM_PLL_CCTRL_MODE0, 0x36); in qcom_dwmac_sgmii_phy_init_1g() 209 regmap_write(regmap, QSERDES_COM_PLL_CCTRL_MODE0, 0x36); in qcom_dwmac_sgmii_phy_init_2p5g()
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D | phy-qcom-qmp-qserdes-com.h | 51 #define QSERDES_COM_PLL_CCTRL_MODE0 0x090 macro
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D | phy-qcom-qmp-usb.c | 159 QMP_PHY_INIT_CFG(QSERDES_COM_PLL_CCTRL_MODE0, 0x28), 241 QMP_PHY_INIT_CFG(QSERDES_COM_PLL_CCTRL_MODE0, 0x28), 315 QMP_PHY_INIT_CFG(QSERDES_COM_PLL_CCTRL_MODE0, 0x28), 943 QMP_PHY_INIT_CFG(QSERDES_COM_PLL_CCTRL_MODE0, 0x28),
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D | phy-qcom-qmp-ufs.c | 137 QMP_PHY_INIT_CFG(QSERDES_COM_PLL_CCTRL_MODE0, 0x28), 205 QMP_PHY_INIT_CFG(QSERDES_COM_PLL_CCTRL_MODE0, 0x28),
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D | phy-qcom-qmp-pcie-msm8996.c | 118 QMP_PHY_INIT_CFG(QSERDES_COM_PLL_CCTRL_MODE0, 0x28),
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D | phy-qcom-qmp-pcie.c | 340 QMP_PHY_INIT_CFG(QSERDES_COM_PLL_CCTRL_MODE0, 0x28),
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