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Searched refs:QSERDES_PLL_CLK_EP_DIV_MODE1 (Results 1 – 2 of 2) sorted by relevance

/drivers/phy/qualcomm/
Dphy-qcom-qmp-qserdes-pll.h28 #define QSERDES_PLL_CLK_EP_DIV_MODE1 0x07c macro
Dphy-qcom-qmp-pcie.c443 QMP_PHY_INIT_CFG(QSERDES_PLL_CLK_EP_DIV_MODE1, 0x28),