Searched refs:QSERDES_PLL_CLK_EP_DIV_MODE1 (Results 1 – 2 of 2) sorted by relevance
/drivers/phy/qualcomm/ | ||
D | phy-qcom-qmp-qserdes-pll.h | 28 #define QSERDES_PLL_CLK_EP_DIV_MODE1 0x07c macro |
D | phy-qcom-qmp-pcie.c | 443 QMP_PHY_INIT_CFG(QSERDES_PLL_CLK_EP_DIV_MODE1, 0x28), |