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Searched refs:REG_A6XX_GMU_GMU_PWR_COL_KEEPALIVE (Results 1 – 3 of 3) sorted by relevance

/drivers/gpu/drm/msm/adreno/
Da6xx_gmu.xml.h311 #define REG_A6XX_GMU_GMU_PWR_COL_KEEPALIVE 0x000050c3 macro
Da6xx_gmu.c884 gmu_write(&a6xx_gpu->gmu, REG_A6XX_GMU_GMU_PWR_COL_KEEPALIVE, 0); in a6xx_gmu_force_off()
Da6xx_gpu.c1687 gmu_write(&a6xx_gpu->gmu, REG_A6XX_GMU_GMU_PWR_COL_KEEPALIVE, 1); in a6xx_fault_detect_irq()