Searched refs:REG_DSI_28nm_PHY_PLL_CAL_CFG4 (Results 1 – 2 of 2) sorted by relevance
336 #define REG_DSI_28nm_PHY_PLL_CAL_CFG4 0x0000007c macro
200 dsi_phy_write(base + REG_DSI_28nm_PHY_PLL_CAL_CFG4, 0x06); in dsi_pll_28nm_clk_set_rate()