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Searched refs:REG_DSI_28nm_PHY_PLL_REFCLK_CFG (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/msm/dsi/
Ddsi_phy_28nm.xml.h236 #define REG_DSI_28nm_PHY_PLL_REFCLK_CFG 0x00000000 macro
/drivers/gpu/drm/msm/dsi/phy/
Ddsi_phy_28nm.c216 dsi_phy_write(base + REG_DSI_28nm_PHY_PLL_REFCLK_CFG, refclk_cfg); in dsi_pll_28nm_clk_set_rate()
253 doubler = dsi_phy_read(base + REG_DSI_28nm_PHY_PLL_REFCLK_CFG) & in dsi_pll_28nm_clk_recalc_rate()