Searched refs:REG_HDMI_PHY_QSERDES_COM_LOCK_CMP2_MODE0 (Results 1 – 2 of 2) sorted by relevance
486 hdmi_pll_write(pll, REG_HDMI_PHY_QSERDES_COM_LOCK_CMP2_MODE0, in hdmi_8996_pll_set_clk_rate()652 cmp2 = hdmi_pll_read(pll, REG_HDMI_PHY_QSERDES_COM_LOCK_CMP2_MODE0); in hdmi_8996_pll_recalc_rate()
1042 #define REG_HDMI_PHY_QSERDES_COM_LOCK_CMP2_MODE0 0x00000050 macro