Home
last modified time | relevance | path

Searched refs:REG_HDMI_PHY_QSERDES_COM_LOCK_CMP3_MODE0 (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/msm/hdmi/
Dhdmi_phy_8996.c488 hdmi_pll_write(pll, REG_HDMI_PHY_QSERDES_COM_LOCK_CMP3_MODE0, in hdmi_8996_pll_set_clk_rate()
653 cmp3 = hdmi_pll_read(pll, REG_HDMI_PHY_QSERDES_COM_LOCK_CMP3_MODE0); in hdmi_8996_pll_recalc_rate()
Dhdmi.xml.h1044 #define REG_HDMI_PHY_QSERDES_COM_LOCK_CMP3_MODE0 0x00000054 macro