Searched refs:REG_HDMI_PHY_QSERDES_COM_SYS_CLK_CTRL (Results 1 – 2 of 2) sorted by relevance
1032 #define REG_HDMI_PHY_QSERDES_COM_SYS_CLK_CTRL 0x0000003c macro
444 hdmi_pll_write(pll, REG_HDMI_PHY_QSERDES_COM_SYS_CLK_CTRL, 0x02); in hdmi_8996_pll_set_clk_rate()