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Searched refs:RVU_PFVF_PF_SHIFT (Results 1 – 10 of 10) sorted by relevance

/drivers/crypto/marvell/octeontx2/
Dotx2_cpt_common.h22 ((((pf) & RVU_PFVF_PF_MASK) << RVU_PFVF_PF_SHIFT) | \
Dotx2_cptpf_mbox.c353 msg->pcifunc = ((u16)cptpf->pf_id << RVU_PFVF_PF_SHIFT) | in otx2_cptpf_vfpf_mbox_handler()
428 cptpf->pf_id = (msg->pcifunc >> RVU_PFVF_PF_SHIFT) & in process_afpf_mbox_msg()
Dotx2_cptpf_ucode.c176 cptpf->pf_id << RVU_PFVF_PF_SHIFT, blkaddr); in cptx_set_ucode_base()
/drivers/net/ethernet/marvell/octeontx2/af/
Drvu_npc_hash.h143 ((((pf) & RVU_PFVF_PF_MASK) << RVU_PFVF_PF_SHIFT) | \
Drvu.h44 #define RVU_PFVF_PF_SHIFT 10 macro
785 !is_sdp_pf(pf << RVU_PFVF_PF_SHIFT); in is_pf_cgxmapped()
Drvu.c405 return (pcifunc >> RVU_PFVF_PF_SHIFT) & RVU_PFVF_PF_MASK; in rvu_get_pf()
2156 ~(RVU_PFVF_PF_MASK << RVU_PFVF_PF_SHIFT); in __rvu_mbox_handler()
2157 msg->pcifunc |= (devid << RVU_PFVF_PF_SHIFT); in __rvu_mbox_handler()
2692 pcifunc = pf << RVU_PFVF_PF_SHIFT; in rvu_flr_handler()
Drvu_debugfs.c2717 pcifunc = (pf << RVU_PFVF_PF_SHIFT); in rvu_dbg_npc_mcam_info_display()
2723 pcifunc = (pf << RVU_PFVF_PF_SHIFT) | (vf + 1); in rvu_dbg_npc_mcam_info_display()
2929 pf = (iter->owner >> RVU_PFVF_PF_SHIFT) & RVU_PFVF_PF_MASK; in rvu_dbg_npc_mcam_show_rules()
2947 pf = (target >> RVU_PFVF_PF_SHIFT) & RVU_PFVF_PF_MASK; in rvu_dbg_npc_mcam_show_rules()
Drvu_cgx.c1056 pcifunc = pf << RVU_PFVF_PF_SHIFT; in rvu_cgx_nix_cuml_stats()
Drvu_nix.c3050 pcifunc >> RVU_PFVF_PF_SHIFT); in nix_update_mce_list()
3200 pcifunc = (pf << RVU_PFVF_PF_SHIFT); in nix_setup_mce_tables()
/drivers/net/ethernet/marvell/octeontx2/nic/
Dotx2_common.h876 #define RVU_PFVF_PF_SHIFT 10 macro
888 return (pcifunc >> RVU_PFVF_PF_SHIFT) & RVU_PFVF_PF_MASK; in rvu_get_pf()