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Searched refs:SG (Results 1 – 13 of 13) sorted by relevance

/drivers/net/ethernet/freescale/fman/
DKconfig20 align buffers, data start, SG fragment length to avoid FMan DMA
34 3. Scatter Gather (SG) frames have more than one SG buffer in
35 the SG list and any one of the buffers, except the last
36 buffer in the SG list has data size that is not a multiple
/drivers/scsi/
D53c700.c349 dma_addr_t offset = (dma_addr_t)((unsigned long)&hostdata->slots[j].SG[0] in NCR_700_detect()
350 - (unsigned long)&hostdata->slots[0].SG[0]); in NCR_700_detect()
1032 slot->SG[0].ins = bS_to_host(SCRIPT_MOVE_DATA_IN | SCSI_SENSE_BUFFERSIZE); in process_script_interrupt()
1033 slot->SG[0].pAddr = bS_to_host(slot->dma_handle); in process_script_interrupt()
1034 slot->SG[1].ins = bS_to_host(SCRIPT_RETURN); in process_script_interrupt()
1035 slot->SG[1].pAddr = 0; in process_script_interrupt()
1037 dma_sync_to_dev(hostdata, slot->SG, sizeof(slot->SG[0])*2); in process_script_interrupt()
1207 __u32 SG = (__u32)bS_to_cpu(hostdata->script[A_SGScriptStartAddress_used[0]]); in process_script_interrupt() local
1211 if(SG >= to32bit(&hostdata->slots[i].pSG[0]) in process_script_interrupt()
1212 && SG <= to32bit(&hostdata->slots[i].pSG[NCR_700_SG_SEGMENTS])) in process_script_interrupt()
[all …]
D53c700.scr34 ; SG components is preceded by a script fragment which moves the
35 ; necessary amount of data and jumps to the next SG segment. The final
36 ; SG segment jumps back to . However, this address is the first SG script
Dhpsa_cmd.h433 struct SGDescriptor SG[SG_ENTRIES_IN_CMD]; member
504 struct SGDescriptor SG[IOACCEL1_MAXSGENTRIES]; member
D53c700_d.h_shipped37 ; SG components is preceded by a script fragment which moves the
38 ; necessary amount of data and jumps to the next SG segment. The final
39 ; SG segment jumps back to . However, this address is the first SG script
Dhpsa.c2308 chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; in hpsa_map_sg_chain_block()
2333 chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; in hpsa_unmap_sg_chain_block()
2811 dma_unmap_single(&pdev->dev, le64_to_cpu(c->SG[i].Addr), in hpsa_pci_unmap()
2812 le32_to_cpu(c->SG[i].Len), in hpsa_pci_unmap()
2837 cp->SG[0].Addr = cpu_to_le64(addr64); in hpsa_map_one()
2838 cp->SG[0].Len = cpu_to_le32(buflen); in hpsa_map_one()
2839 cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */ in hpsa_map_one()
4599 curr_sg = cp->SG; in hpsa_scatter_gather()
4778 curr_sg = cp->SG; in hpsa_scsi_ioaccel1_queue_command()
6455 c->SG[0].Addr = cpu_to_le64(0); in hpsa_passthru_ioctl()
[all …]
D53c700.h171 struct NCR_700_SG_List SG[NCR_700_SG_SEGMENTS+1]; member
DKconfig149 bool "/dev/bsg support (SG v4)"
153 Saying Y here will enable generic SG (SCSI generic) v4 support
/drivers/scsi/mpt3sas/
DKconfig53 int "LSI MPT Fusion SAS 2.0 Max number of SG Entries (16 - 256)"
65 int "LSI MPT Fusion SAS 3.0 Max number of SG Entries (16 - 256)"
/drivers/regulator/
Dda9121-regulator.c172 DA9xxx_STATUS(0, 0, SG, 0, "Handled E_SG\n"),
/drivers/scsi/aic7xxx/
Daic7xxx.seq769 /* Does the hardware have space for another SG entry? */
1093 /* If we are the last SG block, tell the hardware. */
1187 * Load the next SG element's data address and length
1276 * After a DMA finishes, save the SG and STCNT residuals back into
Daic79xx.reg1053 * SG Sequencer Byte Count
2922 * CMC SG Ram Address Pointer
2953 * CMC SG Control
2998 * CMC SG RAM Data Port
Daic79xx.seq1550 /* Does the hardware have space for another SG entry? */