Home
last modified time | relevance | path

Searched refs:SMC_RESP_0 (Results 1 – 13 of 13) sorted by relevance

/drivers/gpu/drm/radeon/
Dtrinity_smc.c36 if (RREG32(SMC_RESP_0) != 0) in trinity_notify_message_to_smu()
40 v = RREG32(SMC_RESP_0); in trinity_notify_message_to_smu()
Dkv_smc.c37 if ((RREG32(SMC_RESP_0) & SMC_RESP_MASK) != 0) in kv_notify_message_to_smu()
41 tmp = RREG32(SMC_RESP_0) & SMC_RESP_MASK; in kv_notify_message_to_smu()
Dsi_smc.c183 tmp = RREG32(SMC_RESP_0); in si_send_msg_to_smc()
188 tmp = RREG32(SMC_RESP_0); in si_send_msg_to_smc()
Dtrinityd.h170 #define SMC_RESP_0 0x230 macro
Dsid.h58 #define SMC_RESP_0 0x230 macro
Dcikd.h430 #define SMC_RESP_0 0x254 macro
Dci_dpm.c1631 tmp = RREG32(SMC_RESP_0); in ci_send_msg_to_smc()
1636 tmp = RREG32(SMC_RESP_0); in ci_send_msg_to_smc()
1908 if (RREG32(SMC_RESP_0) == 1)
Dsi_dpm.c3602 if (RREG32(SMC_RESP_0) == 1)
/drivers/gpu/drm/amd/pm/powerplay/smumgr/
Dsmu7_smumgr.c171 PHM_WAIT_FIELD_UNEQUAL(hwmgr, SMC_RESP_0, SMC_RESP, 0); in smu7_send_msg_to_smc()
173 ret = PHM_READ_FIELD(hwmgr->device, SMC_RESP_0, SMC_RESP); in smu7_send_msg_to_smc()
184 PHM_WAIT_FIELD_UNEQUAL(hwmgr, SMC_RESP_0, SMC_RESP, 0); in smu7_send_msg_to_smc()
186 ret = PHM_READ_FIELD(hwmgr->device, SMC_RESP_0, SMC_RESP); in smu7_send_msg_to_smc()
199 PHM_WAIT_FIELD_UNEQUAL(hwmgr, SMC_RESP_0, SMC_RESP, 0); in smu7_send_msg_to_smc_with_parameter()
Dci_smumgr.c216 PHM_WAIT_FIELD_UNEQUAL(hwmgr, SMC_RESP_0, SMC_RESP, 0); in ci_send_msg_to_smc()
218 ret = PHM_READ_FIELD(hwmgr->device, SMC_RESP_0, SMC_RESP); in ci_send_msg_to_smc()
/drivers/gpu/drm/amd/pm/legacy-dpm/
Dsi_smc.c176 tmp = RREG32(SMC_RESP_0); in amdgpu_si_send_msg_to_smc()
182 return (PPSMC_Result)RREG32(SMC_RESP_0); in amdgpu_si_send_msg_to_smc()
Dsi_dpm.c4076 if (RREG32(SMC_RESP_0) == 1)
/drivers/gpu/drm/amd/amdgpu/
Dsid.h59 #define SMC_RESP_0 0x8C macro