Searched refs:SSPP_RGB2 (Results 1 – 8 of 8) sorted by relevance
| /drivers/gpu/drm/msm/disp/dpu1/ |
| D | dpu_hw_top.c | 119 status->sspp[SSPP_RGB2] = (value >> 16) & 0x3; in dpu_hw_get_danger_status()
231 status->sspp[SSPP_RGB2] = (value >> 16) & 0x1; in dpu_hw_get_safe_status()
|
| D | dpu_hw_ctl.c | 183 case SSPP_RGB2: in dpu_hw_ctl_update_pending_flush_sspp()
431 [SSPP_RGB2] = { { 0, 15, 12 }, { -1 } },
|
| D | dpu_hw_mdss.h | 112 SSPP_RGB2, enumerator
|
| /drivers/gpu/drm/msm/disp/mdp5/ |
| D | mdp5_cfg.c | 30 [SSPP_RGB0] = 16, [SSPP_RGB1] = 17, [SSPP_RGB2] = 18,
200 [SSPP_RGB0] = 16, [SSPP_RGB1] = 17, [SSPP_RGB2] = 18,
290 [SSPP_RGB2] = 18, [SSPP_RGB3] = 22,
542 [SSPP_RGB2] = 18, [SSPP_RGB3] = 22,
|
| D | mdp5_ctl.c | 297 case SSPP_RGB2: return MDP5_CTL_LAYER_REG_RGB2(stage); in mdp_ctl_blend_mask()
320 case SSPP_RGB2: return MDP5_CTL_LAYER_EXT_REG_RGB2_BIT3; in mdp_ctl_blend_ext_mask()
448 case SSPP_RGB2: return MDP5_CTL_FLUSH_RGB2; in mdp_ctl_flush_mask_pipe()
|
| D | mdp5_kms.h | 215 case SSPP_RGB2: in pipe2nclients()
|
| D | mdp5.xml.h | 81 SSPP_RGB2 = 6, enumerator
555 case SSPP_RGB2: return (mdp5_cfg->pipe_rgb.base[2]); in __offset_PIPE()
|
| D | mdp5_kms.c | 685 SSPP_RGB0, SSPP_RGB1, SSPP_RGB2, SSPP_RGB3, in hwpipe_init() enumerator
|