Home
last modified time | relevance | path

Searched refs:TxPwrLimit_2_4G (Results 1 – 2 of 2) sorted by relevance

/drivers/staging/rtl8723bs/hal/
Dhal_com_phycfg.c738 limits[i] = hal_data->TxPwrLimit_2_4G[i] in phy_get_tx_pwr_lmt()
746 hal_data->TxPwrLimit_2_4G[idx_regulation] in phy_get_tx_pwr_lmt()
767 tempPwrLmt = pHalData->TxPwrLimit_2_4G[regulation][bw][rateSection][channel][RF_PATH_A]; in PHY_ConvertTxPowerLimitToPowerIndex()
782 pHalData->TxPwrLimit_2_4G[regulation][bw][rateSection][channel][rfPath] = tempValue; in PHY_ConvertTxPowerLimitToPowerIndex()
801 pHalData->TxPwrLimit_2_4G[i][j][k][m][l] = MAX_POWER_INDEX; in PHY_InitTxPowerLimit()
852 …prevPowerLimit = pHalData->TxPwrLimit_2_4G[regulation][bandwidth][rateSection][channelIndex][RF_PA… in PHY_SetTxPowerLimit()
855 …pHalData->TxPwrLimit_2_4G[regulation][bandwidth][rateSection][channelIndex][RF_PATH_A] = powerLimi… in PHY_SetTxPowerLimit()
/drivers/staging/rtl8723bs/include/
Dhal_data.h251 s8 TxPwrLimit_2_4G[MAX_REGULATION_NUM] member