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Searched refs:UMC_HWIP (Results 1 – 9 of 9) sorted by relevance

/drivers/gpu/drm/amd/amdgpu/
Daldebaran_reg_init.c50 adev->reg_offset[UMC_HWIP][i] = (uint32_t *)(&(UMC_BASE.instance[i])); in aldebaran_reg_base_init()
Darct_reg_init.c54 adev->reg_offset[UMC_HWIP][i] = (uint32_t *)(&(UMC_BASE.instance[i])); in arct_reg_base_init()
Damdgpu_discovery.c203 [UMC_HWIP] = UMC_HWID,
2171 adev->ip_versions[UMC_HWIP][0] = IP_VERSION(6, 0, 0); in amdgpu_discovery_set_ip_blocks()
2193 adev->ip_versions[UMC_HWIP][0] = IP_VERSION(6, 1, 0); in amdgpu_discovery_set_ip_blocks()
2216 adev->ip_versions[UMC_HWIP][0] = IP_VERSION(7, 5, 0); in amdgpu_discovery_set_ip_blocks()
2232 adev->ip_versions[UMC_HWIP][0] = IP_VERSION(7, 0, 0); in amdgpu_discovery_set_ip_blocks()
2254 adev->ip_versions[UMC_HWIP][0] = IP_VERSION(6, 1, 1); in amdgpu_discovery_set_ip_blocks()
2284 adev->ip_versions[UMC_HWIP][0] = IP_VERSION(6, 1, 2); in amdgpu_discovery_set_ip_blocks()
2309 adev->ip_versions[UMC_HWIP][0] = IP_VERSION(6, 7, 0); in amdgpu_discovery_set_ip_blocks()
Dvega20_reg_init.c52 adev->reg_offset[UMC_HWIP][i] = (uint32_t *)(&(UMC_BASE.instance[i])); in vega20_reg_base_init()
Damdgpu_umc.c31 switch (adev->ip_versions[UMC_HWIP][0]) { in amdgpu_umc_convert_error_address()
Dgmc_v9_0.c1457 switch (adev->ip_versions[UMC_HWIP][0]) { in gmc_v9_0_set_umc_funcs()
1555 switch (adev->ip_versions[UMC_HWIP][0]) { in gmc_v9_0_set_mca_ras_funcs()
1642 (adev->ip_versions[UMC_HWIP][0] == IP_VERSION(6, 0, 0))) { in gmc_v9_0_late_init()
Dgmc_v11_0.c590 switch (adev->ip_versions[UMC_HWIP][0]) { in gmc_v11_0_set_umc_funcs()
Dgmc_v10_0.c683 switch (adev->ip_versions[UMC_HWIP][0]) { in gmc_v10_0_set_umc_funcs()
Damdgpu.h665 UMC_HWIP, enumerator