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Searched refs:XELPDP_PORT_BUF_CTL2 (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/i915/display/
Dintel_cx0_phy.c2471 intel_de_rmw(i915, XELPDP_PORT_BUF_CTL2(port), in intel_cx0_powerdown_change_sequence()
2486 intel_de_rmw(i915, XELPDP_PORT_BUF_CTL2(port), in intel_cx0_powerdown_change_sequence()
2491 if (__intel_de_wait_for_register(i915, XELPDP_PORT_BUF_CTL2(port), in intel_cx0_powerdown_change_sequence()
2500 intel_de_rmw(i915, XELPDP_PORT_BUF_CTL2(port), in intel_cx0_setup_powerdown()
2557 intel_de_rmw(i915, XELPDP_PORT_BUF_CTL2(port), lane_pipe_reset, in intel_cx0_phy_lane_reset()
2560 if (__intel_de_wait_for_register(i915, XELPDP_PORT_BUF_CTL2(port), in intel_cx0_phy_lane_reset()
2585 intel_de_rmw(i915, XELPDP_PORT_BUF_CTL2(port), lane_pipe_reset, 0); in intel_cx0_phy_lane_reset()
2587 if (intel_de_wait_for_clear(i915, XELPDP_PORT_BUF_CTL2(port), lane_phy_current_status, in intel_cx0_phy_lane_reset()
Dintel_cx0_phy_regs.h78 #define XELPDP_PORT_BUF_CTL2(port) _MMIO(_PICK_EVEN_2RANGES(port, PORT_TC1, \ macro