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Searched refs:_MG_PLL_DIV1_PORT1 (Results 1 – 1 of 1) sorted by relevance

/drivers/gpu/drm/i915/display/
Dintel_mg_phy_regs.h206 #define _MG_PLL_DIV1_PORT1 0x168A04 macro
216 #define MG_PLL_DIV1(tc_port) _MMIO_PORT((tc_port), _MG_PLL_DIV1_PORT1, \