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/drivers/net/ethernet/mellanox/mlx5/core/steering/
Ddr_matcher.c75 #define DR_MASK_IS_FIRST_MPLS_SET(_misc2, _inner_outer) ( \ argument
76 (_misc2)._inner_outer##_first_mpls_label || \
77 (_misc2)._inner_outer##_first_mpls_exp || \
78 (_misc2)._inner_outer##_first_mpls_s_bos || \
79 (_misc2)._inner_outer##_first_mpls_ttl)