| /drivers/clk/pistachio/ |
| D | clk.h | 19 #define GATE(_id, _name, _pname, _reg, _shift) \ argument
25 .parent = _pname, \
59 #define DIV(_id, _name, _pname, _reg, _width) \ argument
66 .parent = _pname, \
69 #define DIV_F(_id, _name, _pname, _reg, _width, _div_flags) \ argument
76 .parent = _pname, \
86 #define FIXED_FACTOR(_id, _name, _pname, _div) \ argument
91 .parent = _pname, \
119 #define PLL(_id, _name, _pname, _type, _reg, _rates) \ argument
127 .parent = _pname, \
[all …]
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| /drivers/clk/x86/ |
| D | clk-cgu.h | 146 #define LGM_DDIV(_id, _name, _pname, _flags, _reg, \ argument
153 .fw_name = _pname, \
154 .name = _pname, \
219 #define LGM_DIV(_id, _name, _pname, _f, _reg, _shift, _width, \ argument
226 .fw_name = _pname, \
227 .name = _pname, \
241 #define LGM_GATE(_id, _name, _pname, _f, _reg, \ argument
248 .fw_name = _pname, \
249 .name = _pname, \
251 .num_parents = !_pname ? 0 : 1, \
[all …]
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| /drivers/clk/meson/ |
| D | clk-regmap.h | 117 #define __MESON_PCLK(_name, _reg, _bit, _ops, _pname) \ argument
126 .parent_hws = (const struct clk_hw *[]) { _pname }, \
132 #define MESON_PCLK(_name, _reg, _bit, _pname) \ argument
133 __MESON_PCLK(_name, _reg, _bit, &clk_regmap_gate_ops, _pname)
135 #define MESON_PCLK_RO(_name, _reg, _bit, _pname) \ argument
136 __MESON_PCLK(_name, _reg, _bit, &clk_regmap_gate_ro_ops, _pname)
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| D | axg-audio.c | 26 #define AUD_GATE(_name, _reg, _bit, _pname, _iflags) { \ argument
34 .parent_names = (const char *[]){ #_pname }, \
56 #define AUD_DIV(_name, _reg, _shift, _width, _dflags, _pname, _iflags) { \ argument
66 .parent_names = (const char *[]){ #_pname }, \
86 _hi_shift, _hi_width, _pname, _iflags) { \ argument
102 .parent_names = (const char *[]){ #_pname }, \
109 _pname, _iflags) { \ argument
130 .parent_names = (const char *[]){ #_pname }, \
136 #define AUD_PHASE(_name, _reg, _width, _shift, _pname, _iflags) { \ argument
147 .parent_names = (const char *[]){ #_pname }, \
[all …]
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| /drivers/clk/baikal-t1/ |
| D | clk-ccu-div.c | 57 #define CCU_DIV_VAR_INFO(_id, _name, _pname, _base, _width, _flags, _features) \ argument
61 .parent_name = _pname, \
69 #define CCU_DIV_GATE_INFO(_id, _name, _pname, _base, _divider) \ argument
73 .parent_name = _pname, \
79 #define CCU_DIV_BUF_INFO(_id, _name, _pname, _base, _flags) \ argument
83 .parent_name = _pname, \
89 #define CCU_DIV_FIXED_INFO(_id, _name, _pname, _divider) \ argument
93 .parent_name = _pname, \
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| D | clk-ccu-pll.c | 35 #define CCU_PLL_INFO(_id, _name, _pname, _base, _flags, _features) \ argument
39 .parent_name = _pname, \
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| /drivers/regulator/ |
| D | tps6586x-regulator.c | 157 #define TPS6586X_LDO(_id, _pname, vdata, vreg, shift, nbits, \ argument
160 TPS6586X_REGULATOR(_id, rw, _pname, vdata, vreg, shift, nbits, \
164 #define TPS6586X_LDO_LINEAR(_id, _pname, n_volt, min_uv, uv_step, vreg, \ argument
167 TPS6586X_REGULATOR_LINEAR(_id, rw_linear, _pname, n_volt, \
172 #define TPS6586X_FIXED_LDO(_id, _pname, vdata, vreg, shift, nbits, \ argument
175 TPS6586X_REGULATOR(_id, ro, _pname, vdata, vreg, shift, nbits, \
179 #define TPS6586X_DVM(_id, _pname, n_volt, min_uv, uv_step, vreg, shift, \ argument
182 TPS6586X_REGULATOR_LINEAR(_id, rw_linear, _pname, n_volt, \
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| /drivers/clk/samsung/ |
| D | clk.h | 259 #define __PLL(_typ, _id, _name, _pname, _flags, _lock, _con, _rtable) \ argument
264 .parent_name = _pname, \
271 #define PLL(_typ, _id, _name, _pname, _lock, _con, _rtable) \ argument
272 __PLL(_typ, _id, _name, _pname, CLK_GET_RATE_NOCACHE, _lock, \
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| /drivers/clk/ |
| D | clk-loongson1.c | 177 #define LS1X_CLK_DIV(_name, _pname, _offset, _shift, _width, \ argument
193 .parent_hws = (const struct clk_hw *[]) { _pname }, \
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| /drivers/ufs/core/ |
| D | ufs-sysfs.c | 1011 #define UFS_STRING_DESCRIPTOR(_name, _pname) \ argument
1039 index = desc_buf[DEVICE_DESC_PARAM##_pname]; \
1247 #define UFS_LUN_DESC_PARAM(_pname, _puname, _duname, _size) \ argument
1248 static ssize_t _pname##_show(struct device *dev, \
1259 static DEVICE_ATTR_RO(_pname)
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| /drivers/clk/ralink/ |
| D | clk-mt7621.c | 62 #define GATE(_id, _name, _pname, _shift) \ argument
66 .parent_name = _pname, \
|