| /drivers/gpu/drm/msm/ |
| D | msm_gem_vma.c | 15 struct msm_gem_address_space *aspace = container_of(kref, in msm_gem_address_space_destroy() local
18 drm_mm_takedown(&aspace->mm); in msm_gem_address_space_destroy()
19 if (aspace->mmu) in msm_gem_address_space_destroy()
20 aspace->mmu->funcs->destroy(aspace->mmu); in msm_gem_address_space_destroy()
21 put_pid(aspace->pid); in msm_gem_address_space_destroy()
22 kfree(aspace); in msm_gem_address_space_destroy()
26 void msm_gem_address_space_put(struct msm_gem_address_space *aspace) in msm_gem_address_space_put() argument
28 if (aspace) in msm_gem_address_space_put()
29 kref_put(&aspace->kref, msm_gem_address_space_destroy); in msm_gem_address_space_put()
33 msm_gem_address_space_get(struct msm_gem_address_space *aspace) in msm_gem_address_space_get() argument
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| D | msm_gem.h | 50 msm_gem_address_space_get(struct msm_gem_address_space *aspace);
52 void msm_gem_address_space_put(struct msm_gem_address_space *aspace);
63 struct msm_gem_address_space *aspace; member
68 struct msm_gem_vma *msm_gem_vma_new(struct msm_gem_address_space *aspace);
125 struct msm_gem_address_space *aspace);
127 struct msm_gem_address_space *aspace, uint64_t *iova);
129 struct msm_gem_address_space *aspace, uint64_t iova);
131 struct msm_gem_address_space *aspace, uint64_t *iova,
134 struct msm_gem_address_space *aspace, uint64_t *iova);
136 struct msm_gem_address_space *aspace);
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| D | msm_gem.c | 366 struct msm_gem_address_space *aspace) in add_vma() argument
373 vma = msm_gem_vma_new(aspace); in add_vma()
383 struct msm_gem_address_space *aspace) in lookup_vma() argument
391 if (vma->aspace == aspace) in lookup_vma()
422 if (vma->aspace) { in put_iova_spaces()
445 struct msm_gem_address_space *aspace, in get_vma_locked() argument
452 vma = lookup_vma(obj, aspace); in get_vma_locked()
457 vma = add_vma(obj, aspace); in get_vma_locked()
529 struct msm_gem_address_space *aspace) in msm_gem_get_vma_locked() argument
531 return get_vma_locked(obj, aspace, 0, U64_MAX); in msm_gem_get_vma_locked()
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| D | msm_gpu.c | 372 if (submit->aspace) in recover_worker()
373 submit->aspace->faults++; in recover_worker()
482 gpu->aspace->mmu->funcs->resume_translation(gpu->aspace->mmu); in fault_worker()
822 struct msm_gem_address_space *aspace = NULL; in msm_gpu_create_private_address_space() local
831 aspace = gpu->funcs->create_private_address_space(gpu); in msm_gpu_create_private_address_space()
832 if (!IS_ERR(aspace)) in msm_gpu_create_private_address_space()
833 aspace->pid = get_pid(task_pid(task)); in msm_gpu_create_private_address_space()
836 if (IS_ERR_OR_NULL(aspace)) in msm_gpu_create_private_address_space()
837 aspace = msm_gem_address_space_get(gpu->aspace); in msm_gpu_create_private_address_space()
839 return aspace; in msm_gpu_create_private_address_space()
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| D | msm_fb.c | 79 struct msm_gem_address_space *aspace, in msm_framebuffer_prepare() argument
91 ret = msm_gem_get_and_pin_iova(fb->obj[i], aspace, &msm_fb->iova[i]); in msm_framebuffer_prepare()
102 struct msm_gem_address_space *aspace, in msm_framebuffer_cleanup() argument
112 msm_gem_unpin_iova(fb->obj[i], aspace); in msm_framebuffer_cleanup()
119 struct msm_gem_address_space *aspace, int plane) in msm_framebuffer_iova() argument
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| D | msm_drv.c | 270 struct msm_gem_address_space *aspace; in msm_kms_init_aspace() local
294 aspace = msm_gem_address_space_create(mmu, "mdp_kms", in msm_kms_init_aspace()
296 if (IS_ERR(aspace)) { in msm_kms_init_aspace()
297 dev_err(mdp_dev, "aspace create, error %pe\n", aspace); in msm_kms_init_aspace()
301 return aspace; in msm_kms_init_aspace()
602 ctx->aspace = msm_gpu_create_private_address_space(priv->gpu, current); in context_init()
802 return msm_gem_get_iova(obj, ctx->aspace, iova); in msm_ioctl_gem_info_iova()
816 if (priv->gpu->aspace == ctx->aspace) in msm_ioctl_gem_info_set_iova()
822 return msm_gem_set_iova(obj, ctx->aspace, iova); in msm_ioctl_gem_info_set_iova()
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| D | msm_ringbuffer.c | 80 gpu->aspace, &ring->bo, &ring->iova); in msm_ringbuffer_new()
131 msm_gem_kernel_put(ring->bo, ring->gpu->aspace); in msm_ringbuffer_destroy()
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| /drivers/staging/vme_user/ |
| D | vme_fake.c | 48 u32 aspace; member
56 u32 aspace; member
156 dma_addr_t buf_base, u32 aspace, u32 cycle) in fake_slave_set() argument
168 switch (aspace) { in fake_slave_set()
212 bridge->slaves[i].aspace = aspace; in fake_slave_set()
225 dma_addr_t *buf_base, u32 *aspace, u32 *cycle) in fake_slave_get() argument
240 *aspace = bridge->slaves[i].aspace; in fake_slave_get()
253 u32 aspace, u32 cycle, u32 dwidth) in fake_master_set() argument
296 switch (aspace) { in fake_master_set()
320 bridge->masters[i].aspace = aspace; in fake_master_set()
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| D | vme.c | 167 u32 aspace, cycle, dwidth; in vme_get_size() local
172 &aspace, &cycle, &dwidth); in vme_get_size()
179 &buf_base, &aspace, &cycle); in vme_get_size()
193 int vme_check_window(u32 aspace, unsigned long long vme_base, in vme_check_window() argument
201 switch (aspace) { in vme_check_window()
362 dma_addr_t buf_base, u32 aspace, u32 cycle) in vme_slave_set() argument
380 if (!(((image->address_attr & aspace) == aspace) && in vme_slave_set()
386 retval = vme_check_window(aspace, vme_base, size); in vme_slave_set()
391 aspace, cycle); in vme_slave_set()
412 dma_addr_t *buf_base, u32 *aspace, u32 *cycle) in vme_slave_get() argument
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| D | vme_tsi148.c | 468 dma_addr_t pci_base, u32 aspace, u32 cycle) in tsi148_slave_set() argument
484 switch (aspace) { in tsi148_slave_set()
611 dma_addr_t *pci_base, u32 *aspace, u32 *cycle) in tsi148_slave_get() argument
649 *aspace = 0; in tsi148_slave_get()
657 *aspace |= VME_A16; in tsi148_slave_get()
661 *aspace |= VME_A24; in tsi148_slave_get()
665 *aspace |= VME_A32; in tsi148_slave_get()
669 *aspace |= VME_A64; in tsi148_slave_get()
799 unsigned long long vme_base, unsigned long long size, u32 aspace, in tsi148_master_set() argument
951 switch (aspace) { in tsi148_master_set()
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| D | vme_bridge.h | 49 u32 aspace; member
86 u32 aspace; /* Address space of error window*/ member
176 struct vme_error_handler *vme_register_error_handler(struct vme_bridge *bridge, u32 aspace,
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| D | vme_user.h | 14 __u32 aspace; /* Address Space */ member
36 __u32 aspace; /* Address Space */ member
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| /drivers/gpu/drm/msm/disp/mdp4/ |
| D | mdp4_kms.c | 123 struct msm_gem_address_space *aspace = kms->aspace; in mdp4_destroy() local
126 msm_gem_unpin_iova(mdp4_kms->blank_cursor_bo, kms->aspace); in mdp4_destroy()
129 if (aspace) { in mdp4_destroy()
130 aspace->mmu->funcs->detach(aspace->mmu); in mdp4_destroy()
131 msm_gem_address_space_put(aspace); in mdp4_destroy()
386 struct msm_gem_address_space *aspace; in mdp4_kms_init() local
503 aspace = NULL; in mdp4_kms_init()
505 aspace = msm_gem_address_space_create(mmu, in mdp4_kms_init()
508 if (IS_ERR(aspace)) { in mdp4_kms_init()
511 ret = PTR_ERR(aspace); in mdp4_kms_init()
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| D | mdp4_plane.c | 106 return msm_framebuffer_prepare(new_state->fb, kms->aspace, false); in mdp4_plane_prepare_fb()
121 msm_framebuffer_cleanup(fb, kms->aspace, false); in mdp4_plane_cleanup_fb()
172 msm_framebuffer_iova(fb, kms->aspace, 0)); in mdp4_plane_set_scanout()
174 msm_framebuffer_iova(fb, kms->aspace, 1)); in mdp4_plane_set_scanout()
176 msm_framebuffer_iova(fb, kms->aspace, 2)); in mdp4_plane_set_scanout()
178 msm_framebuffer_iova(fb, kms->aspace, 3)); in mdp4_plane_set_scanout()
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| /drivers/gpu/drm/msm/adreno/ |
| D | adreno_gpu.c | 208 struct msm_gem_address_space *aspace; in adreno_iommu_create_address_space() local
227 aspace = msm_gem_address_space_create(mmu, "gpu", in adreno_iommu_create_address_space()
230 if (IS_ERR(aspace) && !IS_ERR(mmu)) in adreno_iommu_create_address_space()
233 return aspace; in adreno_iommu_create_address_space()
265 gpu->aspace->mmu->funcs->resume_translation(gpu->aspace->mmu); in adreno_fault_handler()
354 if (ctx->aspace) in adreno_get_param()
355 *value = gpu->global_faults + ctx->aspace->faults; in adreno_get_param()
363 if (ctx->aspace == gpu->aspace) in adreno_get_param()
365 *value = ctx->aspace->va_start; in adreno_get_param()
368 if (ctx->aspace == gpu->aspace) in adreno_get_param()
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| D | a5xx_preempt.c | 232 MSM_BO_WC | MSM_BO_MAP_PRIV, gpu->aspace, &bo, &iova); in preempt_init_ring()
240 MSM_BO_WC, gpu->aspace, &counters_bo, &counters_iova); in preempt_init_ring()
242 msm_gem_kernel_put(bo, gpu->aspace); in preempt_init_ring()
273 msm_gem_kernel_put(a5xx_gpu->preempt_bo[i], gpu->aspace); in a5xx_preempt_fini()
274 msm_gem_kernel_put(a5xx_gpu->preempt_counters_bo[i], gpu->aspace); in a5xx_preempt_fini()
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| D | a2xx_gpu.c | 116 msm_gpummu_params(gpu->aspace->mmu, &pt_base, &tran_error); in a2xx_hw_init()
473 struct msm_gem_address_space *aspace; in a2xx_create_address_space() local
475 aspace = msm_gem_address_space_create(mmu, "gpu", SZ_16M, in a2xx_create_address_space()
478 if (IS_ERR(aspace) && !IS_ERR(mmu)) in a2xx_create_address_space()
481 return aspace; in a2xx_create_address_space()
554 if (!gpu->aspace) { in a2xx_gpu_init()
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| D | a6xx_gmu.c | 1137 msm_gem_kernel_put(gmu->hfi.obj, gmu->aspace); in a6xx_gmu_memory_free()
1138 msm_gem_kernel_put(gmu->debug.obj, gmu->aspace); in a6xx_gmu_memory_free()
1139 msm_gem_kernel_put(gmu->icache.obj, gmu->aspace); in a6xx_gmu_memory_free()
1140 msm_gem_kernel_put(gmu->dcache.obj, gmu->aspace); in a6xx_gmu_memory_free()
1141 msm_gem_kernel_put(gmu->dummy.obj, gmu->aspace); in a6xx_gmu_memory_free()
1142 msm_gem_kernel_put(gmu->log.obj, gmu->aspace); in a6xx_gmu_memory_free()
1144 gmu->aspace->mmu->funcs->detach(gmu->aspace->mmu); in a6xx_gmu_memory_free()
1145 msm_gem_address_space_put(gmu->aspace); in a6xx_gmu_memory_free()
1174 ret = msm_gem_get_and_pin_iova_range(bo->obj, gmu->aspace, &bo->iova, in a6xx_gmu_memory_alloc()
1199 gmu->aspace = msm_gem_address_space_create(mmu, "gmu", 0x0, 0x80000000); in a6xx_gmu_memory_probe()
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| D | a5xx_gpu.c | 613 gpu->aspace, &a5xx_gpu->shadow_bo, in a5xx_ucode_load()
1033 msm_gem_unpin_iova(a5xx_gpu->pm4_bo, gpu->aspace); in a5xx_destroy()
1038 msm_gem_unpin_iova(a5xx_gpu->pfp_bo, gpu->aspace); in a5xx_destroy()
1043 msm_gem_unpin_iova(a5xx_gpu->gpmu_bo, gpu->aspace); in a5xx_destroy()
1048 msm_gem_unpin_iova(a5xx_gpu->shadow_bo, gpu->aspace); in a5xx_destroy()
1448 SZ_1M, MSM_BO_WC, gpu->aspace, in a5xx_crashdumper_init()
1548 msm_gem_kernel_put(dumper.bo, gpu->aspace); in a5xx_gpu_state_get_hlsq_regs()
1556 msm_gem_kernel_put(dumper.bo, gpu->aspace); in a5xx_gpu_state_get_hlsq_regs()
1782 if (gpu->aspace) in a5xx_gpu_init()
1783 msm_mmu_set_fault_handler(gpu->aspace->mmu, gpu, a5xx_fault_handler); in a5xx_gpu_init()
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| D | a5xx_debugfs.c | 119 msm_gem_unpin_iova(a5xx_gpu->pm4_bo, gpu->aspace); in reset_set()
125 msm_gem_unpin_iova(a5xx_gpu->pfp_bo, gpu->aspace); in reset_set()
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| /drivers/gpu/drm/msm/disp/dpu1/ |
| D | dpu_encoder_phys_wb.c | 554 struct msm_gem_address_space *aspace; in dpu_encoder_phys_wb_prepare_wb_job() local
564 aspace = phys_enc->dpu_kms->base.aspace; in dpu_encoder_phys_wb_prepare_wb_job()
570 ret = msm_framebuffer_prepare(job->fb, aspace, false); in dpu_encoder_phys_wb_prepare_wb_job()
586 ret = dpu_format_populate_layout(aspace, job->fb, &wb_cfg->dest); in dpu_encoder_phys_wb_prepare_wb_job()
613 struct msm_gem_address_space *aspace; in dpu_encoder_phys_wb_cleanup_wb_job() local
618 aspace = phys_enc->dpu_kms->base.aspace; in dpu_encoder_phys_wb_cleanup_wb_job()
620 msm_framebuffer_cleanup(job->fb, aspace, false); in dpu_encoder_phys_wb_cleanup_wb_job()
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| D | dpu_formats.c | 807 struct msm_gem_address_space *aspace, in _dpu_format_populate_addrs_ubwc() argument
819 if (aspace) in _dpu_format_populate_addrs_ubwc()
820 base_addr = msm_framebuffer_iova(fb, aspace, 0); in _dpu_format_populate_addrs_ubwc()
898 struct msm_gem_address_space *aspace, in _dpu_format_populate_addrs_linear() argument
915 if (aspace) in _dpu_format_populate_addrs_linear()
917 msm_framebuffer_iova(fb, aspace, i); in _dpu_format_populate_addrs_linear()
928 struct msm_gem_address_space *aspace, in dpu_format_populate_layout() argument
956 ret = _dpu_format_populate_addrs_ubwc(aspace, fb, layout); in dpu_format_populate_layout()
958 ret = _dpu_format_populate_addrs_linear(aspace, fb, layout); in dpu_format_populate_layout()
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| D | dpu_plane.c | 659 pstate->aspace = kms->base.aspace; in dpu_plane_prepare_fb()
668 if (pstate->aspace) { in dpu_plane_prepare_fb()
670 pstate->aspace, pstate->needs_dirtyfb); in dpu_plane_prepare_fb()
678 ret = dpu_format_populate_layout(pstate->aspace, in dpu_plane_prepare_fb()
682 if (pstate->aspace) in dpu_plane_prepare_fb()
683 msm_framebuffer_cleanup(new_state->fb, pstate->aspace, in dpu_plane_prepare_fb()
704 msm_framebuffer_cleanup(old_state->fb, old_pstate->aspace, in dpu_plane_cleanup_fb()
1118 struct msm_gem_address_space *aspace = kms->base.aspace; in dpu_plane_sspp_atomic_update() local
1123 ret = dpu_format_populate_layout(aspace, fb, &layout); in dpu_plane_sspp_atomic_update()
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| D | dpu_kms.c | 1020 if (!dpu_kms->base.aspace) in _dpu_kms_mmu_destroy()
1023 mmu = dpu_kms->base.aspace->mmu; in _dpu_kms_mmu_destroy()
1026 msm_gem_address_space_put(dpu_kms->base.aspace); in _dpu_kms_mmu_destroy()
1028 dpu_kms->base.aspace = NULL; in _dpu_kms_mmu_destroy()
1033 struct msm_gem_address_space *aspace; in _dpu_kms_mmu_init() local
1035 aspace = msm_kms_init_aspace(dpu_kms->dev); in _dpu_kms_mmu_init()
1036 if (IS_ERR(aspace)) in _dpu_kms_mmu_init()
1037 return PTR_ERR(aspace); in _dpu_kms_mmu_init()
1039 dpu_kms->base.aspace = aspace; in _dpu_kms_mmu_init()
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| /drivers/gpu/drm/msm/disp/mdp5/ |
| D | mdp5_kms.c | 211 struct msm_gem_address_space *aspace = kms->aspace; in mdp5_kms_destroy() local
220 if (aspace) { in mdp5_kms_destroy()
221 aspace->mmu->funcs->detach(aspace->mmu); in mdp5_kms_destroy()
222 msm_gem_address_space_put(aspace); in mdp5_kms_destroy()
558 struct msm_gem_address_space *aspace; in mdp5_kms_init() local
605 aspace = msm_kms_init_aspace(mdp5_kms->dev); in mdp5_kms_init()
606 if (IS_ERR(aspace)) { in mdp5_kms_init()
607 ret = PTR_ERR(aspace); in mdp5_kms_init()
611 kms->aspace = aspace; in mdp5_kms_init()
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