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Searched refs:bLSSIReadEdge (Results 1 – 7 of 7) sorted by relevance

/drivers/staging/rtl8723bs/hal/
Drtl8723b_phycfg.c114 tmplong2 = (tmplong2 & (~bLSSIReadAddress)) | (NewOffset<<23) | bLSSIReadEdge; /* T65 RF */ in phy_RFSerialRead_8723B()
115 …Y_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2|MaskforPhySet, bMaskDWord, tmplong2&(~bLSSIReadEdge)); in phy_RFSerialRead_8723B()
118 tmplong2 = (tmplong2 & (~bLSSIReadAddress)) | (NewOffset<<23) | bLSSIReadEdge; /* T65 RF */ in phy_RFSerialRead_8723B()
119 …Y_SetBBReg(Adapter, rFPGA0_XB_HSSIParameter2|MaskforPhySet, bMaskDWord, tmplong2&(~bLSSIReadEdge)); in phy_RFSerialRead_8723B()
123 …SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2|MaskforPhySet, bMaskDWord, tmplong2 & (~bLSSIReadEdge)); in phy_RFSerialRead_8723B()
124 …PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2|MaskforPhySet, bMaskDWord, tmplong2 | bLSSIReadEdge… in phy_RFSerialRead_8723B()
/drivers/staging/rtl8192u/
Dr819xU_phyreg.h116 #define bLSSIReadEdge 0x80000000 /* LSSI "Read" edge signal */ macro
Dr819xU_phy.c168 rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, bLSSIReadEdge, 0x0); in rtl8192_phy_RFSerialRead()
169 rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, bLSSIReadEdge, 0x1); in rtl8192_phy_RFSerialRead()
/drivers/staging/rtl8192e/rtl8192e/
Dr8192E_phyreg.h304 #define bLSSIReadEdge 0x80000000 /* LSSI "read" edge signal */ macro
Dr8192E_phy.c86 rtl92e_set_bb_reg(dev, pPhyReg->rfHSSIPara2, bLSSIReadEdge, 0x0); in _rtl92e_phy_rf_read()
87 rtl92e_set_bb_reg(dev, pPhyReg->rfHSSIPara2, bLSSIReadEdge, 0x1); in _rtl92e_phy_rf_read()
/drivers/staging/rtl8712/
Drtl871x_mp_phy_regdef.h505 #define bLSSIReadEdge 0x80000000 /* LSSI "Read" edge signal */ macro
/drivers/staging/rtl8723bs/include/
DHal8192CPhyReg.h595 #define bLSSIReadEdge 0x80000000 /* LSSI "Read" edge signal */ macro