/drivers/staging/rtl8192u/ |
D | r8190_rtl8256.c | 50 0x0b, bMask12Bits, 0x100); /* phy para:1ba */ in phy_set_rf8256_bandwidth() 53 0x2c, bMask12Bits, 0x3d7); in phy_set_rf8256_bandwidth() 56 0x0e, bMask12Bits, 0x021); in phy_set_rf8256_bandwidth() 59 0x14, bMask12Bits, 0x5ab); in phy_set_rf8256_bandwidth() 66 …rtl8192_phy_SetRFReg(dev, (enum rf90_radio_path_e)eRFPath, 0x0b, bMask12Bits, 0x300); /* phy para:… in phy_set_rf8256_bandwidth() 67 rtl8192_phy_SetRFReg(dev, (enum rf90_radio_path_e)eRFPath, 0x2c, bMask12Bits, 0x3df); in phy_set_rf8256_bandwidth() 68 rtl8192_phy_SetRFReg(dev, (enum rf90_radio_path_e)eRFPath, 0x0e, bMask12Bits, 0x0a1); in phy_set_rf8256_bandwidth() 72 rtl8192_phy_SetRFReg(dev, (enum rf90_radio_path_e)eRFPath, 0x14, bMask12Bits, 0x59b); in phy_set_rf8256_bandwidth() 74 rtl8192_phy_SetRFReg(dev, (enum rf90_radio_path_e)eRFPath, 0x14, bMask12Bits, 0x5ab); in phy_set_rf8256_bandwidth() 155 rtl8192_phy_SetRFReg(dev, (enum rf90_radio_path_e)eRFPath, 0x0, bMask12Bits, 0xbf); in phy_rf8256_config_para_file() [all …]
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D | r819xU_phy.c | 283 if (bitmask != bMask12Bits) { in rtl8192_phy_SetRFReg() 298 if (bitmask != bMask12Bits) { in rtl8192_phy_SetRFReg() 714 bMask12Bits, WriteData[i]); in rtl8192_phy_checkBBAndRF() 721 bMask12Bits); in rtl8192_phy_checkBBAndRF() 965 bMask12Bits, in rtl8192_phy_ConfigRFWithHeaderFile() 978 bMask12Bits, in rtl8192_phy_ConfigRFWithHeaderFile() 991 bMask12Bits, in rtl8192_phy_ConfigRFWithHeaderFile() 1004 bMask12Bits, in rtl8192_phy_ConfigRFWithHeaderFile()
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D | r819xU_phyreg.h | 141 #define bMask12Bits 0xfff macro
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D | r8192U_dm.c | 1274 rtl8192_phy_SetRFReg(dev, RF90_PATH_A, 0x02, bMask12Bits, 0x4d); in dm_CheckTXPowerTracking_ThermalMeter() 1275 rtl8192_phy_SetRFReg(dev, RF90_PATH_A, 0x02, bMask12Bits, 0x4f); in dm_CheckTXPowerTracking_ThermalMeter() 1276 rtl8192_phy_SetRFReg(dev, RF90_PATH_A, 0x02, bMask12Bits, 0x4d); in dm_CheckTXPowerTracking_ThermalMeter() 1277 rtl8192_phy_SetRFReg(dev, RF90_PATH_A, 0x02, bMask12Bits, 0x4f); in dm_CheckTXPowerTracking_ThermalMeter()
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/drivers/staging/rtl8192e/rtl8192e/ |
D | r8190P_rtl8256.c | 28 0x0b, bMask12Bits, 0x100); in rtl92e_set_bandwidth() 30 0x2c, bMask12Bits, 0x3d7); in rtl92e_set_bandwidth() 32 0x0e, bMask12Bits, 0x021); in rtl92e_set_bandwidth() 36 0x0b, bMask12Bits, 0x300); in rtl92e_set_bandwidth() 38 0x2c, bMask12Bits, 0x3ff); in rtl92e_set_bandwidth() 40 0x0e, bMask12Bits, 0x0e1); in rtl92e_set_bandwidth() 90 bMask12Bits, 0xbf); in rtl92e_config_rf() 109 bMask12Bits); in rtl92e_config_rf()
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D | r8192E_phy.c | 159 if (BitMask != bMask12Bits) { in rtl92e_set_rf_reg() 172 if (BitMask != bMask12Bits) { in rtl92e_set_rf_reg() 355 bMask12Bits, WriteData[i]); in rtl92e_check_bb_and_rf() 476 bMask12Bits, in rtl92e_config_rf_path() 487 bMask12Bits, in rtl92e_config_rf_path() 636 CurrentCmd->Para1, bMask12Bits, in _rtl92e_phy_switch_channel_step()
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D | rtl_dm.c | 815 rtl92e_set_rf_reg(dev, RF90_PATH_A, 0x02, bMask12Bits, 0x4d); in _rtl92e_dm_check_tx_power_tracking_thermal() 816 rtl92e_set_rf_reg(dev, RF90_PATH_A, 0x02, bMask12Bits, 0x4f); in _rtl92e_dm_check_tx_power_tracking_thermal() 817 rtl92e_set_rf_reg(dev, RF90_PATH_A, 0x02, bMask12Bits, 0x4d); in _rtl92e_dm_check_tx_power_tracking_thermal() 818 rtl92e_set_rf_reg(dev, RF90_PATH_A, 0x02, bMask12Bits, 0x4f); in _rtl92e_dm_check_tx_power_tracking_thermal()
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D | r8192E_phyreg.h | 795 #define bMask12Bits 0xfff macro
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/drivers/staging/rtl8723bs/hal/ |
D | HalPhyRf_8723B.c | 1529 RF_Amode = PHY_QueryRFReg(padapter, RF_PATH_A, RF_AC, bMask12Bits); in phy_LCCalibrate_8723B() 1533 RF_Bmode = PHY_QueryRFReg(padapter, RF_PATH_B, RF_AC, bMask12Bits); in phy_LCCalibrate_8723B() 1537 PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_AC, bMask12Bits, (RF_Amode&0x8FFFF)|0x10000); in phy_LCCalibrate_8723B() 1541 PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_B, RF_AC, bMask12Bits, (RF_Bmode&0x8FFFF)|0x10000); in phy_LCCalibrate_8723B() 1545 LC_Cal = PHY_QueryRFReg(padapter, RF_PATH_A, RF_CHNLBW, bMask12Bits); in phy_LCCalibrate_8723B() 1549 PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_CHNLBW, bMask12Bits, LC_Cal|0x08000); in phy_LCCalibrate_8723B() 1557 PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_CHNLBW, bMask12Bits, LC_Cal); in phy_LCCalibrate_8723B() 1564 PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_AC, bMask12Bits, RF_Amode); in phy_LCCalibrate_8723B() 1568 PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_B, RF_AC, bMask12Bits, RF_Bmode); in phy_LCCalibrate_8723B()
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/drivers/staging/rtl8723bs/include/ |
D | Hal8192CPhyReg.h | 1066 #define bMask12Bits 0xfff macro
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