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Searched refs:bXBTxAGC (Results 1 – 7 of 7) sorted by relevance

/drivers/staging/rtl8192u/
Dr819xU_phyreg.h110 #define bXBTxAGC 0xf00 macro
Dr819xU_phy.c803 rtl8192_setBBreg(dev, rFPGA0_TxGainStage, (bXBTxAGC|bXCTxAGC), in rtl8192_BB_Config_ParaFile()
/drivers/staging/rtl8192e/rtl8192e/
Dr8192E_phyreg.h239 #define bXBTxAGC 0xf00 macro
Dr8192E_phy.c410 (bXBTxAGC | bXCTxAGC | bXDTxAGC), dwRegValue); in _rtl92e_bb_config_para_file()
/drivers/staging/rtl8712/
Drtl871x_mp_phy_regdef.h442 #define bXBTxAGC 0xf00 /* Reg 80c rFPGA0_TxGainStage */ macro
Drtl871x_mp.c320 (bXBTxAGC | bXCTxAGC | bXDTxAGC), tmpAGC); in r8712_SetTxAGCOffset()
/drivers/staging/rtl8723bs/include/
DHal8192CPhyReg.h527 #define bXBTxAGC 0xf00 /* Reg 80c rFPGA0_TxGainStage */ macro