/drivers/net/phy/ |
D | mediatek-ge-soc.c | 412 int bias[16] = {}; in tx_amp_fill_result() local 427 memcpy(bias, (const void *)vals_9461, sizeof(bias)); in tx_amp_fill_result() 430 memcpy(bias, (const void *)vals_9481, sizeof(bias)); in tx_amp_fill_result() 436 if (buf[i >> 2] + bias[i] > 63) { in tx_amp_fill_result() 438 bias[i] = 0; in tx_amp_fill_result() 443 MTK_PHY_DA_TX_I2MPB_A_GBE_MASK, (buf[0] + bias[0]) << 10); in tx_amp_fill_result() 445 MTK_PHY_DA_TX_I2MPB_A_TBT_MASK, buf[0] + bias[1]); in tx_amp_fill_result() 447 MTK_PHY_DA_TX_I2MPB_A_HBT_MASK, (buf[0] + bias[2]) << 10); in tx_amp_fill_result() 449 MTK_PHY_DA_TX_I2MPB_A_TST_MASK, buf[0] + bias[3]); in tx_amp_fill_result() 452 MTK_PHY_DA_TX_I2MPB_B_GBE_MASK, (buf[1] + bias[4]) << 8); in tx_amp_fill_result() [all …]
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/drivers/pinctrl/qcom/ |
D | pinctrl-ssbi-gpio.c | 80 u8 bias; member 257 if (pin->bias != PM8XXX_GPIO_BIAS_NP) in pm8xxx_pin_config_get() 262 if (pin->bias != PM8XXX_GPIO_BIAS_PD) in pm8xxx_pin_config_get() 267 if (pin->bias > PM8XXX_GPIO_BIAS_PU_1P5_30) in pm8xxx_pin_config_get() 334 pin->bias = PM8XXX_GPIO_BIAS_NP; in pm8xxx_pin_config_set() 340 pin->bias = PM8XXX_GPIO_BIAS_PD; in pm8xxx_pin_config_set() 353 pin->bias = pin->pull_up_strength; in pm8xxx_pin_config_set() 413 val = pin->bias << 1; in pm8xxx_pin_config_set() 570 seq_printf(s, " %-27s", biases[pin->bias]); in pm8xxx_gpio_dbg_show_one() 627 pin->bias = (val >> 1) & 0x7; in pm8xxx_pin_populate() [all …]
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/drivers/pinctrl/renesas/ |
D | core.c | 947 const struct pinmux_bias_reg *bias) in sh_pfc_check_bias_reg() argument 954 for (i = 0, bits = 0; i < ARRAY_SIZE(bias->pins); i++) in sh_pfc_check_bias_reg() 955 if (bias->pins[i] != SH_PFC_PIN_NONE) in sh_pfc_check_bias_reg() 958 if (bias->puen) in sh_pfc_check_bias_reg() 959 sh_pfc_check_reg(info->name, bias->puen, bits); in sh_pfc_check_bias_reg() 960 if (bias->pud) in sh_pfc_check_bias_reg() 961 sh_pfc_check_reg(info->name, bias->pud, bits); in sh_pfc_check_bias_reg() 962 for (i = 0; i < ARRAY_SIZE(bias->pins); i++) { in sh_pfc_check_bias_reg() 963 pin = sh_pfc_find_pin(info, bias->puen, bias->pins[i]); in sh_pfc_check_bias_reg() 967 if (bias->puen && bias->pud) { in sh_pfc_check_bias_reg() [all …]
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D | pinctrl.c | 585 unsigned int bias; in sh_pfc_pinconf_get() local 591 bias = pfc->info->ops->get_bias(pfc, _pin); in sh_pfc_pinconf_get() 594 if (bias != param) in sh_pfc_pinconf_get() 864 unsigned int bias) in rcar_pinmux_set_bias() argument 876 if (bias != PIN_CONFIG_BIAS_DISABLE) { in rcar_pinmux_set_bias() 881 if (bias == PIN_CONFIG_BIAS_PULL_UP) in rcar_pinmux_set_bias() 890 if (bias == PIN_CONFIG_BIAS_PULL_DOWN) in rcar_pinmux_set_bias() 920 unsigned int bias) in rmobile_pinmux_set_bias() argument 926 switch (bias) { in rmobile_pinmux_set_bias()
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D | pinctrl-rzv2m.c | 491 enum pin_config_param bias; in rzv2m_pinctrl_pinconf_get() local 501 bias = PIN_CONFIG_BIAS_PULL_DOWN; in rzv2m_pinctrl_pinconf_get() 504 bias = PIN_CONFIG_BIAS_PULL_UP; in rzv2m_pinctrl_pinconf_get() 507 bias = PIN_CONFIG_BIAS_DISABLE; in rzv2m_pinctrl_pinconf_get() 510 if (bias != param) in rzv2m_pinctrl_pinconf_get()
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D | sh_pfc.h | 253 unsigned int bias); 770 unsigned int bias); 774 unsigned int bias);
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/drivers/iio/amplifiers/ |
D | ada4250.c | 62 u8 bias; member 91 if (st->bias == 0 || st->bias == 3) in ada4250_set_offset_uv() 97 if (st->bias == ADA4250_BIAS_AVDD) in ada4250_set_offset_uv() 229 st->bias = val; in ada4250_write_raw()
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/drivers/gpu/drm/amd/display/dc/dce/ |
D | dce_ipp.c | 149 GRPH_PRESCALE_BIAS_R, params->bias); in dce_ipp_program_prescale() 153 GRPH_PRESCALE_BIAS_G, params->bias); in dce_ipp_program_prescale() 157 GRPH_PRESCALE_BIAS_B, params->bias); in dce_ipp_program_prescale()
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/drivers/iio/proximity/ |
D | isl29501.c | 715 int *bias) in isl29501_get_calibbias() argument 721 bias); in isl29501_get_calibbias() 725 bias); in isl29501_get_calibbias() 848 int bias) in isl29501_set_calibbias() argument 854 bias); in isl29501_set_calibbias() 858 bias); in isl29501_set_calibbias()
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/drivers/hid/ |
D | hid-playstation.c | 55 short bias; member 996 ds->gyro_calib_data[0].bias = 0; in dualsense_get_calibration_data() 1002 ds->gyro_calib_data[1].bias = 0; in dualsense_get_calibration_data() 1008 ds->gyro_calib_data[2].bias = 0; in dualsense_get_calibration_data() 1022 ds->gyro_calib_data[i].bias = 0; in dualsense_get_calibration_data() 1034 ds->accel_calib_data[0].bias = acc_x_plus - range_2g / 2; in dualsense_get_calibration_data() 1040 ds->accel_calib_data[1].bias = acc_y_plus - range_2g / 2; in dualsense_get_calibration_data() 1046 ds->accel_calib_data[2].bias = acc_z_plus - range_2g / 2; in dualsense_get_calibration_data() 1059 ds->accel_calib_data[i].bias = 0; in dualsense_get_calibration_data() 1403 raw_data - ds->accel_calib_data[i].bias, in dualsense_parse_report() [all …]
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/drivers/power/supply/ |
D | ds2760_battery.c | 494 char bias; in ds2760_battery_set_charged_work() local 513 bias = (signed char) di->current_raw + in ds2760_battery_set_charged_work() 516 dev_dbg(di->dev, "%s: bias = %d\n", __func__, bias); in ds2760_battery_set_charged_work() 518 w1_ds2760_write(di->dev, &bias, DS2760_CURRENT_OFFSET_BIAS, 1); in ds2760_battery_set_charged_work() 524 di->raw[DS2760_CURRENT_OFFSET_BIAS] = bias; in ds2760_battery_set_charged_work()
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/drivers/net/ethernet/netronome/nfp/ |
D | nfp_net_dp.c | 201 int bias = 0; in nfp_net_tx_rings_prepare() local 204 bias = dp->num_stack_tx_rings; in nfp_net_tx_rings_prepare() 207 &nn->r_vecs[r - bias], r, bias); in nfp_net_tx_rings_prepare()
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/drivers/iio/imu/ |
D | adis16480.c | 475 const struct iio_chan_spec *chan, int bias) in adis16480_set_calibbias() argument 483 if (bias < -0x8000 || bias >= 0x8000) in adis16480_set_calibbias() 485 return adis_write_reg_16(&st->adis, reg, bias); in adis16480_set_calibbias() 488 return adis_write_reg_32(&st->adis, reg, bias); in adis16480_set_calibbias() 497 const struct iio_chan_spec *chan, int *bias) in adis16480_get_calibbias() argument 510 *bias = sign_extend32(val16, 15); in adis16480_get_calibbias() 516 *bias = sign_extend32(val32, 31); in adis16480_get_calibbias()
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/drivers/pinctrl/stm32/ |
D | pinctrl-stm32.c | 188 u32 bias) in stm32_gpio_backup_bias() argument 191 bank->pin_backup[offset] |= bias << STM32_GPIO_BKP_PUPD_SHIFT; in stm32_gpio_backup_bias() 1006 unsigned offset, u32 bias) in stm32_pconf_set_bias() argument 1026 val |= bias << (offset * 2); in stm32_pconf_set_bias() 1032 stm32_gpio_backup_bias(bank, offset, bias); in stm32_pconf_set_bias() 1202 u32 mode, alt, drive, speed, bias; in stm32_pconf_dbg_show() local 1224 bias = stm32_pconf_get_bias(bank, offset); in stm32_pconf_dbg_show() 1234 biasing[bias]); in stm32_pconf_dbg_show() 1245 biasing[bias], in stm32_pconf_dbg_show() 1260 biasing[bias], in stm32_pconf_dbg_show()
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/drivers/iio/imu/inv_icm42600/ |
D | inv_icm42600_gyro.c | 377 int32_t bias; in inv_icm42600_gyro_read_offset() local 440 bias = div_s64(val64, 2048 * 180); in inv_icm42600_gyro_read_offset() 441 *val = bias / 1000000000L; in inv_icm42600_gyro_read_offset() 442 *val2 = bias % 1000000000L; in inv_icm42600_gyro_read_offset()
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D | inv_icm42600_accel.c | 365 int32_t bias; in inv_icm42600_accel_read_offset() local 428 bias = div_s64(val64, 10000L); in inv_icm42600_accel_read_offset() 429 *val = bias / 1000000L; in inv_icm42600_accel_read_offset() 430 *val2 = bias % 1000000L; in inv_icm42600_accel_read_offset()
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/drivers/gpu/drm/amd/display/dc/inc/hw/ |
D | ipp.h | 53 uint16_t bias; member
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/drivers/pinctrl/ |
D | pinctrl-ingenic.c | 3833 unsigned int bias, reg; in ingenic_pinconf_get() local 3850 X1830_GPIO_PEL, &bias); in ingenic_pinconf_get() 3853 X1830_GPIO_PEH, &bias); in ingenic_pinconf_get() 3855 bias = (bias >> idxh) & (GPIO_PULL_UP | GPIO_PULL_DOWN); in ingenic_pinconf_get() 3857 pullup = (bias == GPIO_PULL_UP) && (jzpc->info->pull_ups[offt] & BIT(idx)); in ingenic_pinconf_get() 3858 pulldown = (bias == GPIO_PULL_DOWN) && (jzpc->info->pull_downs[offt] & BIT(idx)); in ingenic_pinconf_get() 3922 unsigned int pin, unsigned int bias) in ingenic_set_bias() argument 3925 switch (bias) { in ingenic_set_bias() 3952 REG_SET(X1830_GPIO_PEL), bias << idxh); in ingenic_set_bias() 3957 REG_SET(X1830_GPIO_PEH), bias << idxh); in ingenic_set_bias() [all …]
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/drivers/video/fbdev/ |
D | pxa168fb.h | 368 #define CFG_BIAS_OUT(bias) ((bias) << 8) argument
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/drivers/pinctrl/bcm/ |
D | Kconfig | 137 as bias pull up, pull down, and drive strength configurations, when 188 as bias pull up, pull down, and drive strength configurations, when
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/drivers/net/wireless/ath/ath9k/ |
D | ar9003_eeprom.c | 3606 int bias = ar9003_modal_header(ah, is2ghz)->xpaBiasLvl; in ar9003_hw_xpa_bias_level_apply() local 3610 REG_RMW_FIELD(ah, AR_CH0_TOP2(ah), AR_CH0_TOP2_XPABIASLVL, bias); in ar9003_hw_xpa_bias_level_apply() 3612 REG_RMW_FIELD(ah, AR_CH0_TOP(ah), AR_CH0_TOP_XPABIASLVL, bias); in ar9003_hw_xpa_bias_level_apply() 3614 REG_RMW_FIELD(ah, AR_CH0_TOP(ah), AR_CH0_TOP_XPABIASLVL, bias); in ar9003_hw_xpa_bias_level_apply() 3617 bias >> 2); in ar9003_hw_xpa_bias_level_apply() 4127 u8 bias; in ar9003_hw_xlna_bias_strength_apply() local 4135 bias = ar9003_modal_header(ah, is2ghz)->xlna_bias_strength; in ar9003_hw_xlna_bias_strength_apply() 4137 bias & 0x3); in ar9003_hw_xlna_bias_strength_apply() 4138 bias >>= 2; in ar9003_hw_xlna_bias_strength_apply() 4140 bias & 0x3); in ar9003_hw_xlna_bias_strength_apply() [all …]
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/drivers/gpu/drm/i915/gt/ |
D | intel_context.c | 104 unsigned int bias = i915_ggtt_pin_bias(vma) | PIN_OFFSET_BIAS; in __context_pin_state() local 107 err = i915_ggtt_pin(vma, ww, 0, bias | PIN_HIGH); in __context_pin_state()
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/drivers/gpu/drm/amd/pm/ |
D | amdgpu_pm.c | 1904 int bias = 0; in amdgpu_set_smartshift_bias() local 1917 r = kstrtoint(buf, 10, &bias); in amdgpu_set_smartshift_bias() 1921 if (bias > AMDGPU_SMARTSHIFT_MAX_BIAS) in amdgpu_set_smartshift_bias() 1922 bias = AMDGPU_SMARTSHIFT_MAX_BIAS; in amdgpu_set_smartshift_bias() 1923 else if (bias < AMDGPU_SMARTSHIFT_MIN_BIAS) in amdgpu_set_smartshift_bias() 1924 bias = AMDGPU_SMARTSHIFT_MIN_BIAS; in amdgpu_set_smartshift_bias() 1926 amdgpu_smartshift_bias = bias; in amdgpu_set_smartshift_bias()
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/drivers/media/dvb-frontends/ |
D | dib0090.c | 173 u16 bias; member 2191 state->bias = dib0090_read_reg(state, 0x13); in dib0090_get_temperature() 2192 dib0090_write_reg(state, 0x13, state->bias | (0x3 << 8)); in dib0090_get_temperature() 2200 dib0090_write_reg(state, 0x13, (state->bias & ~(0x3 << 8)) | (0x2 << 8)); in dib0090_get_temperature() 2214 dib0090_write_reg(state, 0x13, state->bias); in dib0090_get_temperature()
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/drivers/cpufreq/ |
D | Kconfig.x86 | 181 tristate "AMD frequency sensitivity feedback powersave bias" 184 This adds AMD-specific powersave bias function to the ondemand
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