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Searched refs:cbc (Results 1 – 17 of 17) sorted by relevance

/drivers/crypto/intel/keembay/
DKconfig13 cbc(aes), ctr(aes), ccm(aes), gcm(aes), cbc(sm4), ctr(sm4), ccm(sm4)
17 enabled: ecb(aes), cts(cbc(aes)), ecb(sm4) and cts(cbc(sm4)).
38 Provides OCS version of cts(cbc(aes)) and cts(cbc(sm4)).
/drivers/soc/qcom/
Dwcnss_ctrl.c39 struct completion cbc; member
158 complete(&wcnss->cbc); in wcnss_ctrl_smd_callback()
308 ret = wait_for_completion_timeout(&wcnss->cbc, WCNSS_REQUEST_TIMEOUT); in wcnss_async_probe()
328 init_completion(&wcnss->cbc); in wcnss_ctrl_probe()
/drivers/staging/rtl8723bs/core/
Drtw_security.c1477 u8 cbc[AES_BLOCK_SIZE], pad[AES_BLOCK_SIZE]; in omac1_aes_128_vector() local
1485 memset(cbc, 0, AES_BLOCK_SIZE); in omac1_aes_128_vector()
1498 cbc[i] ^= *pos++; in omac1_aes_128_vector()
1506 aes_encrypt(&ctx, cbc, cbc); in omac1_aes_128_vector()
1516 cbc[i] ^= *pos++; in omac1_aes_128_vector()
1523 cbc[left] ^= 0x80; in omac1_aes_128_vector()
1528 pad[i] ^= cbc[i]; in omac1_aes_128_vector()
/drivers/staging/media/deprecated/atmel/
Datmel-sama5d2-isc.c220 regmap_write(regmap, ISC_CBC_BRIGHT + isc->offsets.cbc, in isc_sama5d2_config_cbc()
222 regmap_write(regmap, ISC_CBC_CONTRAST + isc->offsets.cbc, in isc_sama5d2_config_cbc()
445 isc->offsets.cbc = ISC_SAMA5D2_CBC_OFFSET; in atmel_isc_probe()
Datmel-sama7g5-isc.c234 regmap_write(regmap, ISC_CBC_BRIGHT + isc->offsets.cbc, isc->ctrls.brightness); in isc_sama7g5_config_cbc()
235 regmap_write(regmap, ISC_CBC_CONTRAST + isc->offsets.cbc, isc->ctrls.contrast); in isc_sama7g5_config_cbc()
434 isc->offsets.cbc = ISC_SAMA7G5_CBC_OFFSET; in microchip_xisc_probe()
Datmel-isc.h176 u32 cbc; member
Datmel-isc-base.c1982 REG_FIELD(ISC_CBC_CTRL + isc->offsets.cbc, 0, 0), in atmel_isc_pipeline_init()
/drivers/edac/
Dthunderx_edac.c1795 struct thunderx_l2c *cbc = container_of(msix, struct thunderx_l2c, in thunderx_l2c_cbc_isr() local
1798 unsigned long head = ring_pos(cbc->ring_head, ARRAY_SIZE(cbc->err_ctx)); in thunderx_l2c_cbc_isr()
1799 struct l2c_err_ctx *ctx = &cbc->err_ctx[head]; in thunderx_l2c_cbc_isr()
1801 ctx->reg_int = readq(cbc->regs + L2C_CBC_INT_W1C); in thunderx_l2c_cbc_isr()
1805 ctx->reg_ext = readq(cbc->regs + L2C_CBC_RSDERR); in thunderx_l2c_cbc_isr()
1808 ctx->reg_ext = readq(cbc->regs + L2C_CBC_MIBERR); in thunderx_l2c_cbc_isr()
1811 ctx->reg_ext = readq(cbc->regs + L2C_CBC_IODISOCIERR); in thunderx_l2c_cbc_isr()
1814 writeq(ctx->reg_int, cbc->regs + L2C_CBC_INT_W1C); in thunderx_l2c_cbc_isr()
1816 cbc->ring_head++; in thunderx_l2c_cbc_isr()
/drivers/media/platform/microchip/
Dmicrochip-sama7g5-isc.c254 regmap_write(regmap, ISC_CBC_BRIGHT + isc->offsets.cbc, isc->ctrls.brightness); in isc_sama7g5_config_cbc()
255 regmap_write(regmap, ISC_CBC_CONTRAST + isc->offsets.cbc, isc->ctrls.contrast); in isc_sama7g5_config_cbc()
454 isc->offsets.cbc = ISC_SAMA7G5_CBC_OFFSET; in microchip_xisc_probe()
Dmicrochip-sama5d2-isc.c240 regmap_write(regmap, ISC_CBC_BRIGHT + isc->offsets.cbc, in isc_sama5d2_config_cbc()
242 regmap_write(regmap, ISC_CBC_CONTRAST + isc->offsets.cbc, in isc_sama5d2_config_cbc()
465 isc->offsets.cbc = ISC_SAMA5D2_CBC_OFFSET; in microchip_isc_probe()
Dmicrochip-isc.h177 u32 cbc; member
Dmicrochip-isc-base.c1935 REG_FIELD(ISC_CBC_CTRL + isc->offsets.cbc, 0, 0), in microchip_isc_pipeline_init()
/drivers/crypto/nx/
DMakefile4 nx-aes-cbc.o \
/drivers/dma/ppc4xx/
Dxor.h68 u32 cbc; /* control */ member
Dadma.c160 cb->cbc, cb->cbbc, cb->cbs, in print_cb()
241 p->cbc = XOR_CBCR_CBCE_BIT; in ppc440spe_desc_init_interrupt()
281 hw_desc->cbc = XOR_CBCR_TGT_BIT | src_cnt; in ppc440spe_desc_init_xor()
284 hw_desc->cbc |= XOR_CBCR_CBCE_BIT; in ppc440spe_desc_init_xor()
303 hw_desc->cbc = XOR_CBCR_TGT_BIT; in ppc440spe_desc_init_dma2pq()
306 hw_desc->cbc |= XOR_CBCR_CBCE_BIT; in ppc440spe_desc_init_dma2pq()
714 xor_hw_desc->cbc |= XOR_CBCR_LNK_BIT; in ppc440spe_xor_set_link()
1143 xcb->cbc |= XOR_CBCR_CBCE_BIT; in ppc440spe_chan_append()
3089 hw_desc->cbc &= ~XOR_CDCR_OAC_MSK; in ppc440spe_desc_set_xor_src_cnt()
3090 hw_desc->cbc |= src_cnt; in ppc440spe_desc_set_xor_src_cnt()
/drivers/crypto/caam/
Dpdb.h140 struct ipsec_encap_cbc cbc; member
206 struct ipsec_decap_cbc cbc; member
/drivers/crypto/
DKconfig374 authenc(hmac(shaX),Y(cbc)) algorithms.
650 Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode.