| /drivers/misc/ |
| D | fastrpc.c | 252 struct fastrpc_channel_ctx *cctx; member
286 struct fastrpc_channel_ctx *cctx; member
297 struct fastrpc_channel_ctx *cctx; member
319 int vmid = map->fl->cctx->vmperms[0].vmid; in fastrpc_free_map()
455 struct device *rdev = &fl->cctx->rpdev->dev; in fastrpc_remote_heap_alloc()
462 struct fastrpc_channel_ctx *cctx; in fastrpc_channel_ctx_free() local
464 cctx = container_of(ref, struct fastrpc_channel_ctx, refcount); in fastrpc_channel_ctx_free()
466 kfree(cctx); in fastrpc_channel_ctx_free()
469 static void fastrpc_channel_ctx_get(struct fastrpc_channel_ctx *cctx) in fastrpc_channel_ctx_get() argument
471 kref_get(&cctx->refcount); in fastrpc_channel_ctx_get()
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| /drivers/gpu/drm/nouveau/nvkm/engine/fifo/ |
| D | chan.c | 42 nvkm_chan_cctx_bind(struct nvkm_chan *chan, struct nvkm_engn *engn, struct nvkm_cctx *cctx) in nvkm_chan_cctx_bind() argument
51 CHAN_TRACE(chan, "%sbind cctx %d[%s]", cctx ? "" : "un", engn->id, engine->subdev.name); in nvkm_chan_cctx_bind()
63 engn->func->bind(engn, cctx, chan); in nvkm_chan_cctx_bind()
75 struct nvkm_cctx *cctx = *pcctx; in nvkm_chan_cctx_put() local
77 if (cctx) { in nvkm_chan_cctx_put()
78 struct nvkm_engn *engn = cctx->vctx->ectx->engn; in nvkm_chan_cctx_put()
80 if (refcount_dec_and_mutex_lock(&cctx->refs, &chan->cgrp->mutex)) { in nvkm_chan_cctx_put()
82 nvkm_cgrp_vctx_put(chan->cgrp, &cctx->vctx); in nvkm_chan_cctx_put()
83 list_del(&cctx->head); in nvkm_chan_cctx_put()
84 kfree(cctx); in nvkm_chan_cctx_put()
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| D | uchan.c | 70 struct nvkm_cctx *cctx; member
79 struct nvkm_cctx *cctx = uobj->cctx; in nvkm_uchan_object_fini_1() local
80 struct nvkm_ectx *ectx = cctx->vctx->ectx; in nvkm_uchan_object_fini_1()
86 if (refcount_dec_and_mutex_lock(&cctx->uses, &chan->cgrp->mutex)) { in nvkm_uchan_object_fini_1()
102 struct nvkm_cctx *cctx = uobj->cctx; in nvkm_uchan_object_init_0() local
103 struct nvkm_ectx *ectx = cctx->vctx->ectx; in nvkm_uchan_object_init_0()
110 if (!refcount_inc_not_zero(&cctx->uses)) { in nvkm_uchan_object_init_0()
112 if (!refcount_inc_not_zero(&cctx->uses)) { in nvkm_uchan_object_init_0()
120 nvkm_chan_cctx_bind(chan, ectx->engn, cctx); in nvkm_uchan_object_init_0()
121 refcount_set(&cctx->uses, 1); in nvkm_uchan_object_init_0()
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| D | gv100.c | 92 gv100_ectx_bind(struct nvkm_engn *engn, struct nvkm_cctx *cctx, struct nvkm_chan *chan) in gv100_ectx_bind() argument
96 if (cctx) { in gv100_ectx_bind()
97 addr = cctx->vctx->vma->addr; in gv100_ectx_bind()
104 nvkm_mo32(chan->inst, 0x0ac, 0x00010000, cctx ? 0x00010000 : 0x00000000); in gv100_ectx_bind()
117 gv100_ectx_ce_bind(struct nvkm_engn *engn, struct nvkm_cctx *cctx, struct nvkm_chan *chan) in gv100_ectx_ce_bind() argument
119 const u64 bar2 = cctx ? nvkm_memory_bar2(cctx->vctx->inst->memory) : 0ULL; in gv100_ectx_ce_bind()
124 nvkm_mo32(chan->inst, 0x0ac, 0x00020000, cctx ? 0x00020000 : 0x00000000); in gv100_ectx_ce_bind()
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| D | g84.c | 106 g84_ectx_bind(struct nvkm_engn *engn, struct nvkm_cctx *cctx, struct nvkm_chan *chan) in g84_ectx_bind() argument
129 if (!cctx) { in g84_ectx_bind()
139 start = cctx->vctx->inst->addr; in g84_ectx_bind()
140 limit = start + cctx->vctx->inst->size - 1; in g84_ectx_bind()
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| D | nv40.c | 125 nv40_ectx_bind(struct nvkm_engn *engn, struct nvkm_cctx *cctx, struct nvkm_chan *chan) in nv40_ectx_bind() argument
149 if (cctx) in nv40_ectx_bind()
150 inst = cctx->vctx->inst->addr >> 4; in nv40_ectx_bind()
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| D | nv50.c | 150 nv50_ectx_bind(struct nvkm_engn *engn, struct nvkm_cctx *cctx, struct nvkm_chan *chan) in nv50_ectx_bind() argument
165 if (!cctx) { in nv50_ectx_bind()
189 start = cctx->vctx->inst->addr; in nv50_ectx_bind()
190 limit = start + cctx->vctx->inst->size - 1; in nv50_ectx_bind()
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| D | gk104.c | 134 gk104_ectx_bind(struct nvkm_engn *engn, struct nvkm_cctx *cctx, struct nvkm_chan *chan) in gk104_ectx_bind() argument
162 if (cctx) { in gk104_ectx_bind()
163 addr = cctx->vctx->vma->addr; in gk104_ectx_bind()
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| D | gf100.c | 161 gf100_ectx_bind(struct nvkm_engn *engn, struct nvkm_cctx *cctx, struct nvkm_chan *chan) in gf100_ectx_bind() argument
178 if (cctx) { in gf100_ectx_bind()
179 addr = cctx->vctx->vma->addr; in gf100_ectx_bind()
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| /drivers/infiniband/hw/bnxt_re/ |
| D | qplib_res.h | 283 struct bnxt_qplib_chip_ctx *cctx; member
299 static inline bool bnxt_qplib_is_chip_gen_p5(struct bnxt_qplib_chip_ctx *cctx) in bnxt_qplib_is_chip_gen_p5() argument
301 return (cctx->chip_num == CHIP_NUM_57508 || in bnxt_qplib_is_chip_gen_p5()
302 cctx->chip_num == CHIP_NUM_57504 || in bnxt_qplib_is_chip_gen_p5()
303 cctx->chip_num == CHIP_NUM_57502); in bnxt_qplib_is_chip_gen_p5()
308 return bnxt_qplib_is_chip_gen_p5(res->cctx) ? in bnxt_qplib_get_hwq_type()
312 static inline u8 bnxt_qplib_get_ring_type(struct bnxt_qplib_chip_ctx *cctx) in bnxt_qplib_get_ring_type() argument
314 return bnxt_qplib_is_chip_gen_p5(cctx) ? in bnxt_qplib_get_ring_type()
485 struct bnxt_qplib_chip_ctx *cctx, in bnxt_qplib_ring_nq_db() argument
491 if (bnxt_qplib_is_chip_gen_p5(cctx)) in bnxt_qplib_ring_nq_db()
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| D | main.c | 92 struct bnxt_qplib_chip_ctx *cctx; in bnxt_re_set_db_offset() local
102 cctx = rdev->chip_ctx; in bnxt_re_set_db_offset()
120 if (cctx->modes.db_push && l2db_len && en_dev->l2_db_size != barlen) { in bnxt_re_set_db_offset()
128 struct bnxt_qplib_chip_ctx *cctx; in bnxt_re_set_drv_mode() local
130 cctx = rdev->chip_ctx; in bnxt_re_set_drv_mode()
131 cctx->modes.wqe_mode = bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx) ? in bnxt_re_set_drv_mode()
147 rdev->qplib_res.cctx = NULL; in bnxt_re_destroy_chip_ctx()
170 rdev->qplib_res.cctx = rdev->chip_ctx; in bnxt_re_setup_chip_ctx()
419 struct bnxt_qplib_chip_ctx *cctx; in bnxt_re_hwrm_qcaps() local
423 cctx = rdev->chip_ctx; in bnxt_re_hwrm_qcaps()
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| D | qplib_res.c | 59 struct bnxt_qplib_chip_ctx *cctx,
556 rc = bnxt_qplib_alloc_stats_ctx(res->pdev, res->cctx, &ctx->stats); in bnxt_qplib_alloc_ctx()
808 if (!bnxt_qplib_is_chip_gen_p5(res->cctx)) { in bnxt_qplib_alloc_dpi_tbl()
856 struct bnxt_qplib_chip_ctx *cctx, in bnxt_qplib_alloc_stats_ctx() argument
861 stats->size = cctx->hw_stats_size; in bnxt_qplib_alloc_stats_ctx()
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| D | qplib_rcfw.c | 784 rcfw->res->cctx, true); in bnxt_qplib_service_creq()
855 if (bnxt_qplib_is_chip_gen_p5(rcfw->res->cctx)) in bnxt_qplib_init_rcfw()
982 rcfw->max_timeout = res->cctx->hwrm_cmd_max_timeout; in bnxt_qplib_alloc_rcfw_channel()
1002 bnxt_qplib_ring_nq_db(&creq->creq_db.dbinfo, rcfw->res->cctx, false); in bnxt_qplib_rcfw_stop_irq()
1066 bnxt_qplib_ring_nq_db(&creq->creq_db.dbinfo, res->cctx, true); in bnxt_qplib_rcfw_start_irq()
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| D | qplib_sp.c | 62 if (!bnxt_qplib_is_chip_gen_p5(rcfw->res->cctx)) in bnxt_qplib_is_atomic_cap()
136 attr->max_qp_sges = bnxt_qplib_is_chip_gen_p5(rcfw->res->cctx) ? in bnxt_qplib_get_dev_attr()
170 if (rcfw->res->cctx->hwrm_intf_ver >= HWRM_VERSION_DEV_ATTR_MAX_DPI) in bnxt_qplib_get_dev_attr()
937 if (bnxt_qplib_is_chip_gen_p5(res->cctx)) { in bnxt_qplib_modify_cc()
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| D | qplib_fp.c | 376 bnxt_qplib_ring_nq_db(&nq->nq_db.dbinfo, nq->res->cctx, true); in bnxt_qplib_service_nq()
421 bnxt_qplib_ring_nq_db(&nq->nq_db.dbinfo, nq->res->cctx, false); in bnxt_qplib_nq_stop_irq()
490 bnxt_qplib_ring_nq_db(&nq->nq_db.dbinfo, res->cctx, true); in bnxt_qplib_nq_start_irq()
917 qp->cctx = res->cctx; in bnxt_qplib_create_qp1()
998 psn_sz = bnxt_qplib_is_chip_gen_p5(res->cctx) ? in bnxt_qplib_create_qp()
1146 qp->cctx = res->cctx; in bnxt_qplib_create_qp()
1652 if (bnxt_qplib_is_chip_gen_p5(qp->cctx)) { in bnxt_qplib_fill_psn_search()
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| D | qplib_fp.h | 272 struct bnxt_qplib_chip_ctx *cctx; member
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| D | ib_verbs.c | 4296 struct bnxt_qplib_chip_ctx *cctx; in UVERBS_HANDLER() local
4314 cctx = rdev->chip_ctx; in UVERBS_HANDLER()
4318 if (cctx->modes.db_push) { in UVERBS_HANDLER()
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| /drivers/pinctrl/intel/ |
| D | pinctrl-cherryview.c | 761 struct intel_community_context *cctx = &pctrl->context.communities[0]; in chv_gpio_request_enable() local
765 for (i = 0; i < ARRAY_SIZE(cctx->intr_lines); i++) { in chv_gpio_request_enable()
766 if (cctx->intr_lines[i] == offset) { in chv_gpio_request_enable()
767 cctx->intr_lines[i] = CHV_INVALID_HWIRQ; in chv_gpio_request_enable()
1269 struct intel_community_context *cctx = &pctrl->context.communities[0]; in chv_gpio_irq_startup() local
1286 if (cctx->intr_lines[intsel] == CHV_INVALID_HWIRQ) { in chv_gpio_irq_startup()
1290 cctx->intr_lines[intsel] = hwirq; in chv_gpio_irq_startup()
1302 struct intel_community_context *cctx = &pctrl->context.communities[0]; in chv_gpio_set_intr_line() local
1310 if (cctx->intr_lines[intsel] == pin) in chv_gpio_set_intr_line()
1313 if (cctx->intr_lines[intsel] == CHV_INVALID_HWIRQ) { in chv_gpio_set_intr_line()
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