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Searched refs:cgs_write_register (Results 1 – 15 of 15) sorted by relevance

/drivers/gpu/drm/amd/pm/powerplay/smumgr/
Dsmu7_smumgr.c43 cgs_write_register(hwmgr->device, mmSMC_IND_INDEX_11, smc_addr); in smu7_set_smc_sram_address()
108 cgs_write_register(hwmgr->device, mmSMC_IND_DATA_11, data); in smu7_copy_bytes_to_smc()
144 cgs_write_register(hwmgr->device, mmSMC_IND_DATA_11, data); in smu7_copy_bytes_to_smc()
181 cgs_write_register(hwmgr->device, mmSMC_RESP_0, 0); in smu7_send_msg_to_smc()
182 cgs_write_register(hwmgr->device, mmSMC_MESSAGE_0, msg); in smu7_send_msg_to_smc()
201 cgs_write_register(hwmgr->device, mmSMC_MSG_ARG_0, parameter); in smu7_send_msg_to_smc_with_parameter()
285 cgs_write_register(hwmgr->device, mmSMC_IND_DATA_11, value); in smu7_write_smc_sram_dword()
460 cgs_write_register(hwmgr->device, mmSMC_IND_INDEX_11, 0x20000); in smu7_upload_smc_firmware_data()
464 cgs_write_register(hwmgr->device, mmSMC_IND_DATA_11, *src++); in smu7_upload_smc_firmware_data()
504 cgs_write_register(hwmgr->device, reg, data); in execute_pwr_table()
[all …]
Dsmu8_smumgr.c88 cgs_write_register(hwmgr->device, mmSMU_MP1_SRBM2P_ARG_0, parameter); in smu8_send_msg_to_smc_with_parameter()
90 cgs_write_register(hwmgr->device, mmSMU_MP1_SRBM2P_RESP_0, 0); in smu8_send_msg_to_smc_with_parameter()
91 cgs_write_register(hwmgr->device, mmSMU_MP1_SRBM2P_MSG_0, msg); in smu8_send_msg_to_smc_with_parameter()
125 cgs_write_register(hwmgr->device, mmMP0PUB_IND_INDEX_0, in smu8_set_smc_sram_address()
141 cgs_write_register(hwmgr->device, mmMP0PUB_IND_DATA_0, value); in smu8_write_smc_sram_dword()
157 cgs_write_register(hwmgr->device, mmMP0PUB_IND_INDEX, index); in smu8_check_fw_load_finish()
195 cgs_write_register(hwmgr->device, mmCP_MEC_CNTL, tmp); in smu8_load_mec_firmware()
204 cgs_write_register(hwmgr->device, mmCP_CPC_IC_BASE_CNTL, tmp); in smu8_load_mec_firmware()
208 cgs_write_register(hwmgr->device, mmCP_CPC_IC_BASE_LO, reg_data); in smu8_load_mec_firmware()
212 cgs_write_register(hwmgr->device, mmCP_CPC_IC_BASE_HI, reg_data); in smu8_load_mec_firmware()
[all …]
Dci_smumgr.c103 cgs_write_register(hwmgr->device, mmSMC_IND_INDEX_0, smc_addr); in ci_set_smc_sram_address()
134 cgs_write_register(hwmgr->device, mmSMC_IND_DATA_0, data); in ci_copy_bytes_to_smc()
170 cgs_write_register(hwmgr->device, mmSMC_IND_DATA_0, data); in ci_copy_bytes_to_smc()
213 cgs_write_register(hwmgr->device, mmSMC_RESP_0, 0); in ci_send_msg_to_smc()
214 cgs_write_register(hwmgr->device, mmSMC_MESSAGE_0, msg); in ci_send_msg_to_smc()
230 cgs_write_register(hwmgr->device, mmSMC_MSG_ARG_0, parameter); in ci_send_msg_to_smc_with_parameter()
2333 cgs_write_register(hwmgr->device, mmSMC_IND_INDEX_0, start_addr); in ci_load_smc_ucode()
2338 cgs_write_register(hwmgr->device, mmSMC_IND_DATA_0, data); in ci_load_smc_ucode()
2689 …cgs_write_register(hwmgr->device, mmMC_SEQ_RAS_TIMING_LP, cgs_read_register(hwmgr->device, mmMC_SE… in ci_initialize_mc_reg_table()
2690 …cgs_write_register(hwmgr->device, mmMC_SEQ_CAS_TIMING_LP, cgs_read_register(hwmgr->device, mmMC_SE… in ci_initialize_mc_reg_table()
[all …]
Diceland_smumgr.c166 cgs_write_register(hwmgr->device, mmSMC_IND_INDEX_0, start_addr); in iceland_upload_smc_firmware_data()
171 cgs_write_register(hwmgr->device, mmSMC_IND_DATA_0, data); in iceland_upload_smc_firmware_data()
2616 …cgs_write_register(hwmgr->device, mmMC_SEQ_RAS_TIMING_LP, cgs_read_register(hwmgr->device, mmMC_SE… in iceland_initialize_mc_reg_table()
2617 …cgs_write_register(hwmgr->device, mmMC_SEQ_CAS_TIMING_LP, cgs_read_register(hwmgr->device, mmMC_SE… in iceland_initialize_mc_reg_table()
2618 …cgs_write_register(hwmgr->device, mmMC_SEQ_DLL_STBY_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_… in iceland_initialize_mc_reg_table()
2619 …cgs_write_register(hwmgr->device, mmMC_SEQ_G5PDX_CMD0_LP, cgs_read_register(hwmgr->device, mmMC_SE… in iceland_initialize_mc_reg_table()
2620 …cgs_write_register(hwmgr->device, mmMC_SEQ_G5PDX_CMD1_LP, cgs_read_register(hwmgr->device, mmMC_SE… in iceland_initialize_mc_reg_table()
2621 …cgs_write_register(hwmgr->device, mmMC_SEQ_G5PDX_CTRL_LP, cgs_read_register(hwmgr->device, mmMC_SE… in iceland_initialize_mc_reg_table()
2622 …cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_DVS_CMD_LP, cgs_read_register(hwmgr->device, mmMC_S… in iceland_initialize_mc_reg_table()
2623 …cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_DVS_CTL_LP, cgs_read_register(hwmgr->device, mmMC_S… in iceland_initialize_mc_reg_table()
[all …]
Dtonga_smumgr.c3081 cgs_write_register(hwmgr->device, mmMC_SEQ_RAS_TIMING_LP, in tonga_initialize_mc_reg_table()
3083 cgs_write_register(hwmgr->device, mmMC_SEQ_CAS_TIMING_LP, in tonga_initialize_mc_reg_table()
3085 cgs_write_register(hwmgr->device, mmMC_SEQ_DLL_STBY_LP, in tonga_initialize_mc_reg_table()
3087 cgs_write_register(hwmgr->device, mmMC_SEQ_G5PDX_CMD0_LP, in tonga_initialize_mc_reg_table()
3089 cgs_write_register(hwmgr->device, mmMC_SEQ_G5PDX_CMD1_LP, in tonga_initialize_mc_reg_table()
3091 cgs_write_register(hwmgr->device, mmMC_SEQ_G5PDX_CTRL_LP, in tonga_initialize_mc_reg_table()
3093 cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_DVS_CMD_LP, in tonga_initialize_mc_reg_table()
3095 cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_DVS_CTL_LP, in tonga_initialize_mc_reg_table()
3097 cgs_write_register(hwmgr->device, mmMC_SEQ_MISC_TIMING_LP, in tonga_initialize_mc_reg_table()
3099 cgs_write_register(hwmgr->device, mmMC_SEQ_MISC_TIMING2_LP, in tonga_initialize_mc_reg_table()
[all …]
Dfiji_smumgr.c213 cgs_write_register(hwmgr->device, mmCP_MEC_CNTL, 0x50000000); in fiji_start_avfs_btc()
215 cgs_write_register(hwmgr->device, mmGRBM_SOFT_RESET, 0xffffffff); in fiji_start_avfs_btc()
217 cgs_write_register(hwmgr->device, mmGRBM_SOFT_RESET, 0); in fiji_start_avfs_btc()
2523 cgs_write_register(hwmgr->device, mmMC_SEQ_RAS_TIMING_LP, in fiji_initialize_mc_reg_table()
2525 cgs_write_register(hwmgr->device, mmMC_SEQ_CAS_TIMING_LP, in fiji_initialize_mc_reg_table()
2527 cgs_write_register(hwmgr->device, mmMC_SEQ_MISC_TIMING2_LP, in fiji_initialize_mc_reg_table()
2529 cgs_write_register(hwmgr->device, mmMC_SEQ_WR_CTL_D1_LP, in fiji_initialize_mc_reg_table()
2531 cgs_write_register(hwmgr->device, mmMC_SEQ_RD_CTL_D0_LP, in fiji_initialize_mc_reg_table()
2533 cgs_write_register(hwmgr->device, mmMC_SEQ_RD_CTL_D1_LP, in fiji_initialize_mc_reg_table()
2535 cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_TIMING_LP, in fiji_initialize_mc_reg_table()
Dpolaris10_smumgr.c111 cgs_write_register(hwmgr->device, mmCP_MEC_CNTL, 0x50000000); in polaris10_perform_btc()
113 cgs_write_register(hwmgr->device, mmGRBM_SOFT_RESET, 0xffffffff); in polaris10_perform_btc()
114 cgs_write_register(hwmgr->device, mmGRBM_SOFT_RESET, 0); in polaris10_perform_btc()
/drivers/gpu/drm/amd/include/
Dcgs_common.h131 …cgs_write_register(device, mm##reg, (cgs_read_register(device, mm##reg) & ~CGS_REG_FIELD_MASK(reg,…
167 #define cgs_write_register(dev,offset,value) \ macro
/drivers/gpu/drm/amd/amdgpu/
Damdgpu_acp.c456 cgs_write_register(adev->acp.cgs_device, mmACP_SOFT_RESET, val); in acp_hw_init()
474 cgs_write_register(adev->acp.cgs_device, mmACP_CONTROL, val); in acp_hw_init()
492 cgs_write_register(adev->acp.cgs_device, mmACP_SOFT_RESET, val); in acp_hw_init()
525 cgs_write_register(adev->acp.cgs_device, mmACP_SOFT_RESET, val); in acp_hw_fini()
542 cgs_write_register(adev->acp.cgs_device, mmACP_CONTROL, val); in acp_hw_fini()
/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dvega10_powertune.c793 cgs_write_register(hwmgr->device, config_regs->offset, data); in vega10_program_gc_didt_config_registers()
986 cgs_write_register(hwmgr->device, mmGC_DIDT_CTRL0, data); in vega10_disable_psm_gc_didt_config()
1100 cgs_write_register(hwmgr->device, mmGC_EDC_CTRL, data); in vega10_disable_psm_gc_edc_config()
Dsmu_helper.c151 cgs_write_register(hwmgr->device, indirect_port, index); in phm_wait_on_indirect_register()
188 cgs_write_register(hwmgr->device, indirect_port, index); in phm_wait_for_indirect_register_unequal()
Dsmu_helper.h163 cgs_write_register(device, mm##reg, PHM_SET_FIELD( \
Dsmu7_powertune.c946 cgs_write_register(hwmgr->device, config_regs->offset, data); in smu7_program_pt_config_registers()
981 cgs_write_register(hwmgr->device, mmGRBM_GFX_INDEX, value); in smu7_enable_didt_config()
1010 cgs_write_register(hwmgr->device, mmGRBM_GFX_INDEX, value2); in smu7_enable_didt_config()
Dsmu7_hwmgr.c205 cgs_write_register(hwmgr->device, mmMC_SEQ_IO_DEBUG_INDEX, 0x9F); in smu7_get_mc_microcode_version()
538 cgs_write_register(hwmgr->device, mmMC_ARB_DRAM_TIMING, mc_arb_dram_timing); in smu7_copy_and_switch_arb_sets()
539 cgs_write_register(hwmgr->device, mmMC_ARB_DRAM_TIMING2, mc_arb_dram_timing2); in smu7_copy_and_switch_arb_sets()
543 cgs_write_register(hwmgr->device, mmMC_ARB_DRAM_TIMING_1, mc_arb_dram_timing); in smu7_copy_and_switch_arb_sets()
544 cgs_write_register(hwmgr->device, mmMC_ARB_DRAM_TIMING2_1, mc_arb_dram_timing2); in smu7_copy_and_switch_arb_sets()
553 cgs_write_register(hwmgr->device, mmMC_CG_CONFIG, mc_cg_config); in smu7_copy_and_switch_arb_sets()
1285 cgs_write_register(hwmgr->device, 0x1488, in smu7_start_dpm()
4765 cgs_write_register(hwmgr->device, mmMC_SEQ_IO_DEBUG_INDEX, in smu7_check_mc_firmware()
/drivers/gpu/drm/amd/display/amdgpu_dm/
Damdgpu_dm.c10952 cgs_write_register(ctx->cgs_device, address, value); in dm_write_reg_func()