Searched refs:clk_get_parent (Results 1 – 25 of 33) sorted by relevance
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| /drivers/clk/sunxi/ |
| D | clk-mod0.c | 186 mmc = clk_get_parent(clk); in mmc_get_phase()
196 mmc_parent = clk_get_parent(mmc); in mmc_get_phase()
222 mmc = clk_get_parent(clk); in mmc_set_phase()
232 mmc_parent = clk_get_parent(mmc); in mmc_set_phase()
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| /drivers/sh/clk/ |
| D | core.c | 168 .arg = clk_get_parent(clk), in clk_rate_div_range_round()
188 .arg = clk_get_parent(clk), in clk_rate_mult_range_round()
543 struct clk *clk_get_parent(struct clk *clk) in clk_get_parent() function
550 EXPORT_SYMBOL_GPL(clk_get_parent);
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| /drivers/clk/ |
| D | clk_test.c | 512 KUNIT_EXPECT_TRUE(test, clk_is_match(clk_get_parent(clk), parent)); in clk_test_multiple_parents_mux_get_parent()
564 KUNIT_ASSERT_TRUE(test, clk_is_match(clk_get_parent(clk), parent1)); in clk_test_multiple_parents_mux_set_range_set_parent_get_rate()
665 KUNIT_EXPECT_PTR_EQ(test, clk_get_parent(clk), NULL); in clk_test_orphan_transparent_multiple_parent_mux_get_parent()
690 new_parent = clk_get_parent(clk); in clk_test_orphan_transparent_multiple_parent_mux_set_parent()
1016 KUNIT_EXPECT_TRUE(test, clk_is_match(clk_get_parent(clk), parent)); in clk_test_single_parent_mux_get_parent()
1060 parent = clk_get_parent(clk); in clk_test_single_parent_mux_set_range_disjoint_child_last()
1092 parent = clk_get_parent(clk); in clk_test_single_parent_mux_set_range_disjoint_parent_last()
1120 parent = clk_get_parent(clk); in clk_test_single_parent_mux_set_range_round_rate_parent_only()
1150 parent = clk_get_parent(clk); in clk_test_single_parent_mux_set_range_round_rate_child_smaller()
1188 parent = clk_get_parent(clk); in clk_test_single_parent_mux_set_range_round_rate_parent_smaller()
[all …]
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| D | clk-cdce925.c | 202 struct clk *parent = clk_get_parent(hw->clk); in cdce925_pll_calc_range_bits()
398 struct clk *pll = clk_get_parent(hw->clk); in cdce925_clk_best_parent_rate()
399 struct clk *root = clk_get_parent(pll); in cdce925_clk_best_parent_rate()
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| /drivers/clk/st/ |
| D | clkgen-mux.c | 93 __clk_get_name(clk_get_parent(clk)), in st_of_clkgen_mux_setup()
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| D | clkgen-pll.c | 677 __clk_get_name(clk_get_parent(clk)), in clkgen_pll_register()
744 __clk_get_name(clk_get_parent(clk)), in clkgen_odf_register()
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| D | clkgen-fsyn.c | 975 __clk_get_name(clk_get_parent(clk)), in st_of_create_quadfs_fsynths()
1029 __clk_get_name(clk_get_parent(clk)), in st_of_quadfs_setup()
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| D | clk-flexgen.c | 273 __clk_get_name(clk_get_parent(clk)), in clk_register_flexgen()
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| /drivers/cpufreq/ |
| D | spear-cpufreq.c | 81 sys_clk = clk_get_parent(spear_cpufreq.clk); in spear1340_set_cpu_rate()
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| D | tegra124-cpufreq.c | 36 orig_parent = clk_get_parent(priv->cpu_clk); in tegra124_cpu_switch_to_dfll()
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| D | armada-37xx-cpufreq.c | 452 parent = clk_get_parent(clk); in armada37xx_cpufreq_driver_init()
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| D | mediatek-cpufreq.c | 205 struct clk *armpll = clk_get_parent(cpu_clk); in mtk_cpufreq_set_target()
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| /drivers/iio/adc/ |
| D | ep93xx_adc.c | 187 pclk = clk_get_parent(priv->clk); in ep93xx_adc_probe()
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| D | ingenic-adc.c | 320 parent_clk = clk_get_parent(adc->clk); in jz4725b_adc_init_clk_div()
356 parent_clk = clk_get_parent(adc->clk); in jz4770_adc_init_clk_div()
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| /drivers/gpu/drm/ingenic/ |
| D | ingenic-drm-drv.c | 1334 parent_clk = clk_get_parent(priv->lcd_clk); in ingenic_drm_bind()
1365 parent_clk = clk_get_parent(priv->pix_clk); in ingenic_drm_bind()
1416 struct clk *parent_clk = clk_get_parent(priv->pix_clk); in ingenic_drm_unbind()
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| /drivers/devfreq/ |
| D | mtk-cci-devfreq.c | 141 cci_pll = clk_get_parent(drv->cci_clk); in mtk_ccifreq_target()
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| D | sun8i-a33-mbus.c | 413 base_freq = clk_get_rate(clk_get_parent(priv->clk_dram)); in sun8i_a33_mbus_probe()
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| /drivers/mfd/ |
| D | intel-lpss.c | 283 parent = clk_get_parent(clk); in intel_lpss_unregister_clock_tree()
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| /drivers/mmc/host/ |
| D | renesas_sdhi_core.c | 982 priv->clkh = clk_get_parent(clk_get_parent(priv->clk)); in renesas_sdhi_probe()
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| /drivers/clk/rockchip/ |
| D | clk-pll.c | 328 struct clk *parent = clk_get_parent(hw->clk); in rockchip_rk3036_pll_init()
812 struct clk *parent = clk_get_parent(hw->clk); in rockchip_rk3399_pll_init()
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| /drivers/clk/imx/ |
| D | clk-imx6q.c | 350 (clk_get_parent(hws[IMX6QDL_CLK_PERIPH_PRE]->clk) == in init_ldb_clks()
403 if (clk_get_parent(hws[IMX6QDL_CLK_PERIPH_PRE]->clk) == in disable_anatop_clocks()
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| /drivers/gpu/drm/tegra/ |
| D | dsi.c | 1182 parent = clk_get_parent(dsi->clk); in tegra_dsi_setup_clocks()
1465 parent = clk_get_parent(dsi->slave->clk); in tegra_dsi_ganged_setup()
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| /drivers/gpu/drm/imx/ipuv3/ |
| D | imx-ldb.c | 667 imx_ldb->clk_parent[i] = clk_get_parent(imx_ldb->clk_sel[i]); in imx_ldb_probe()
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| /drivers/clk/davinci/ |
| D | pll.c | 644 struct clk_hw *hw = __clk_get_hw(clk_get_parent(cnd->clk)); in davinci_pll_sysclk_rate_change()
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| /drivers/net/ethernet/apm/xgene/ |
| D | xgene_enet_hw.c | 423 struct clk *parent = clk_get_parent(pdata->clk); in xgene_enet_configure_clock()
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