| /drivers/clk/ |
| D | clk_test.c | 222 rate = clk_get_rate(clk); in clk_test_get_rate()
247 rate = clk_get_rate(clk); in clk_test_set_get_rate()
276 rate = clk_get_rate(clk); in clk_test_set_set_get_rate()
303 set_rate = clk_get_rate(clk); in clk_test_round_set_get_rate()
364 rate = clk_get_rate(clk); in clk_test_uncached_get_rate()
370 rate = clk_get_rate(clk); in clk_test_uncached_get_rate()
394 rate = clk_get_rate(clk); in clk_test_uncached_set_range()
425 rate = clk_get_rate(clk); in clk_test_uncached_updated_rate_set_range()
583 rate = clk_get_rate(clk); in clk_test_multiple_parents_mux_set_range_set_parent_get_rate()
716 parent_rate = clk_get_rate(parent); in clk_test_orphan_transparent_multiple_parent_mux_set_parent_drop_range()
[all …]
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| /drivers/cpufreq/ |
| D | mvebu-cpufreq.c | 76 ret = dev_pm_opp_add(cpu_dev, clk_get_rate(clk), 0); in armada_xp_pmsu_cpufreq_init()
82 ret = dev_pm_opp_add(cpu_dev, clk_get_rate(clk) / 2, 0); in armada_xp_pmsu_cpufreq_init()
84 dev_pm_opp_remove(cpu_dev, clk_get_rate(clk)); in armada_xp_pmsu_cpufreq_init()
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| D | s3c64xx-cpufreq.c | 58 old_freq = clk_get_rate(policy->clk) / 1000; in s3c64xx_cpufreq_set_target()
99 clk_get_rate(policy->clk) / 1000); in s3c64xx_cpufreq_set_target()
182 if (!vddarm && freq->frequency > clk_get_rate(policy->clk) / 1000) in s3c64xx_cpufreq_driver_init()
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| D | kirkwood-cpufreq.c | 47 return clk_get_rate(priv.powersave_clk) / 1000; in kirkwood_cpufreq_get_cpu_frequency()
132 kirkwood_freq_table[0].frequency = clk_get_rate(priv.cpu_clk) / 1000; in kirkwood_cpufreq_probe()
146 kirkwood_freq_table[1].frequency = clk_get_rate(priv.ddr_clk) / 1000; in kirkwood_cpufreq_probe()
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| D | imx6q-cpufreq.c | 68 old_freq = clk_get_rate(clks[ARM].clk) / 1000; in imx6q_set_target()
129 if (freq_hz > clk_get_rate(clks[PLL2_PFD2_396M].clk)) in imx6q_set_target()
137 if (freq_hz > clk_get_rate(clks[PLL2_BUS].clk)) { in imx6q_set_target()
144 if (freq_hz > clk_get_rate(clks[PLL2_PFD2_396M].clk)) { in imx6q_set_target()
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| /drivers/watchdog/ |
| D | digicolor_wdt.c | 64 dc_wdt_set(wdt, wdog->timeout * clk_get_rate(wdt->clk)); in dc_wdt_start()
82 dc_wdt_set(wdt, t * clk_get_rate(wdt->clk)); in dc_wdt_set_timeout()
93 return count / clk_get_rate(wdt->clk); in dc_wdt_get_timeleft()
133 dc_wdt_wdd.max_timeout = U32_MAX / clk_get_rate(wdt->clk); in dc_wdt_probe()
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| D | rtd119x_wdt.c | 72 writel(val * clk_get_rate(data->clk), data->base + RTD119X_TCWOV); in rtd119x_wdt_set_timeout()
117 data->wdt_dev.max_timeout = 0xffffffff / clk_get_rate(data->clk); in rtd119x_wdt_probe()
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| /drivers/clocksource/ |
| D | clksrc_st_lpc.c | 50 rate = clk_get_rate(ddata.clk); in st_clksrc_init()
80 if (!clk_get_rate(clk)) { in st_clksrc_setup_clk()
127 clk_get_rate(ddata.clk)); in st_clksrc_of_register()
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| D | timer-armada-370-xp.c | 347 timer_clk = clk_get_rate(clk); in armada_xp_timer_init()
364 timer_clk = clk_get_rate(clk); in armada_375_timer_init()
383 timer_clk = clk_get_rate(clk) / TIMER_DIVIDER; in armada_375_timer_init()
407 timer_clk = clk_get_rate(clk) / TIMER_DIVIDER; in armada_370_timer_init()
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| D | clps711x-timer.c | 32 unsigned long rate = clk_get_rate(clock); in clps711x_clksrc_init()
61 rate = clk_get_rate(clock); in _clps711x_clkevt_init()
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| D | timer-imx-gpt.c | 154 unsigned int c = clk_get_rate(imxtm->clk_per); in mxc_clocksource_init()
285 clockevents_config_and_register(ced, clk_get_rate(imxtm->clk_per), in mxc_clockevent_init()
305 if (clk_get_rate(imxtm->clk_per) == V2_TIMER_RATE_OSC_DIV8) in imx31_gpt_setup_tctl()
318 if (clk_get_rate(imxtm->clk_per) == V2_TIMER_RATE_OSC_DIV8) { in imx6dl_gpt_setup_tctl()
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| D | timer-orion.c | 147 rate = clk_get_rate(clk); in orion_timer_init()
174 ticks_per_jiffy = (clk_get_rate(clk) + HZ/2) / HZ; in orion_timer_init()
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| /drivers/clk/ti/ |
| D | clk-2xxx.c | 234 (clk_get_rate(clk_get_sys(NULL, "sys_ck")) / 1000000), in omap2xxx_dt_clk_init()
235 (clk_get_rate(clk_get_sys(NULL, "sys_ck")) / 100000) % 10, in omap2xxx_dt_clk_init()
236 (clk_get_rate(clk_get_sys(NULL, "dpll_ck")) / 1000000), in omap2xxx_dt_clk_init()
237 (clk_get_rate(clk_get_sys(NULL, "mpu_ck")) / 1000000)); in omap2xxx_dt_clk_init()
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| D | clk-3xxx.c | 329 (clk_get_rate(clk_get_sys(NULL, "osc_sys_ck")) / 1000000), in omap3xxx_dt_clk_init()
330 (clk_get_rate(clk_get_sys(NULL, "osc_sys_ck")) / 100000) % 10, in omap3xxx_dt_clk_init()
331 (clk_get_rate(clk_get_sys(NULL, "core_ck")) / 1000000), in omap3xxx_dt_clk_init()
332 (clk_get_rate(clk_get_sys(NULL, "arm_fck")) / 1000000)); in omap3xxx_dt_clk_init()
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| /drivers/devfreq/ |
| D | imx8m-ddrc.c | 215 clk_get_rate(priv->dram_pll); in imx8m_ddrc_set_freq()
246 old_freq = clk_get_rate(priv->dram_core); in imx8m_ddrc_target()
260 new_freq = clk_get_rate(priv->dram_core); in imx8m_ddrc_target()
278 *freq = clk_get_rate(priv->dram_core); in imx8m_ddrc_get_cur_freq()
423 priv->profile.initial_freq = clk_get_rate(priv->dram_core); in imx8m_ddrc_probe()
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| D | imx-bus.c | 43 *freq = clk_get_rate(priv->clk); in imx_bus_get_cur_freq()
123 priv->profile.initial_freq = clk_get_rate(priv->clk); in imx_bus_probe()
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| /drivers/gpu/ipu-v3/ |
| D | ipu-di.c | 426 in_rate = clk_get_rate(clk); in ipu_di_config_clock()
443 clkrate = clk_get_rate(di->clk_ipu); in ipu_di_config_clock()
467 in_rate = clk_get_rate(clk); in ipu_di_config_clock()
496 clk_get_rate(di->clk_ipu), in ipu_di_config_clock()
497 clk_get_rate(di->clk_di), in ipu_di_config_clock()
499 clk_get_rate(di->clk_di_pixel) / (clkgen0 >> 4)); in ipu_di_config_clock()
571 clk_get_rate(di->clk_ipu), in ipu_di_init_sync_panel()
572 clk_get_rate(di->clk_di), in ipu_di_init_sync_panel()
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| /drivers/net/can/mscan/ |
| D | mpc5xxx_can.c | 166 freq_calc = clk_get_rate(clk_in); in mpc512x_can_get_clock()
185 freq_calc = clk_get_rate(clk_in); in mpc512x_can_get_clock()
203 freq_calc = clk_get_rate(clk_can); in mpc512x_can_get_clock()
222 freq_calc = clk_get_rate(clk_in); in mpc512x_can_get_clock()
225 freq_calc = clk_get_rate(clk_can); in mpc512x_can_get_clock()
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| /drivers/net/ethernet/stmicro/stmmac/ |
| D | dwmac-intel-plat.c | 37 rate = clk_get_rate(dwmac->tx_clk); in kmb_eth_fix_mac_speed()
121 rate = clk_get_rate(dwmac->tx_clk); in intel_eth_plat_probe()
135 rate = clk_get_rate(plat_dat->clk_ptp_ref); in intel_eth_plat_probe()
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| /drivers/clk/sunxi/ |
| D | clk-mod0.c | 191 mmc_rate = clk_get_rate(mmc); in mmc_get_phase()
201 mmc_parent_rate = clk_get_rate(mmc_parent); in mmc_get_phase()
227 mmc_rate = clk_get_rate(mmc); in mmc_set_phase()
237 mmc_parent_rate = clk_get_rate(mmc_parent); in mmc_set_phase()
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| /drivers/mfd/ |
| D | fsl-imx25-tsadc.c | 113 clk_get_rate(tsadc->clk)); in mx25_tsadc_setup_clk()
115 clk_div = DIV_ROUND_UP(clk_get_rate(tsadc->clk), 1750000); in mx25_tsadc_setup_clk()
129 clk_get_rate(tsadc->clk) / (2 * clk_div + 2)); in mx25_tsadc_setup_clk()
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| /drivers/sh/clk/ |
| D | core.c | 158 return clk_get_rate(rounder->arg) / pos; in clk_rate_div_range_iter()
178 return clk_get_rate(rounder->arg) * pos; in clk_rate_mult_range_iter()
471 unsigned long clk_get_rate(struct clk *clk) in clk_get_rate() function
478 EXPORT_SYMBOL_GPL(clk_get_rate);
567 return clk_get_rate(clk); in clk_round_rate()
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| /drivers/clk/qcom/ |
| D | krait-cc.c | 413 cur_rate = clk_get_rate(clks[l2_mux]); in krait_cc_probe()
422 pr_info("L2 @ %lu KHz\n", clk_get_rate(clks[l2_mux]) / 1000); in krait_cc_probe()
425 cur_rate = clk_get_rate(clk); in krait_cc_probe()
434 pr_info("CPU%d @ %lu KHz\n", cpu, clk_get_rate(clk) / 1000); in krait_cc_probe()
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| /drivers/pwm/ |
| D | pwm-samsung.c | 172 rate = clk_get_rate(chip->base_clk); in pwm_samsung_get_tin_rate()
193 rate = clk_get_rate(clk); in pwm_samsung_calc_tin()
617 clk_get_rate(chip->base_clk), in pwm_samsung_probe()
618 !IS_ERR(chip->tclk0) ? clk_get_rate(chip->tclk0) : 0, in pwm_samsung_probe()
619 !IS_ERR(chip->tclk1) ? clk_get_rate(chip->tclk1) : 0); in pwm_samsung_probe()
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| /drivers/clk/imx/ |
| D | clk-vf610.c | 448 clk_set_rate(clk[VF610_CLK_QSPI0_X4_DIV], clk_get_rate(clk[VF610_CLK_QSPI0_SEL]) / 2); in vf610_clocks_init()
449 clk_set_rate(clk[VF610_CLK_QSPI0_X2_DIV], clk_get_rate(clk[VF610_CLK_QSPI0_X4_DIV]) / 2); in vf610_clocks_init()
450 clk_set_rate(clk[VF610_CLK_QSPI0_X1_DIV], clk_get_rate(clk[VF610_CLK_QSPI0_X2_DIV]) / 2); in vf610_clocks_init()
453 clk_set_rate(clk[VF610_CLK_QSPI1_X4_DIV], clk_get_rate(clk[VF610_CLK_QSPI1_SEL]) / 2); in vf610_clocks_init()
454 clk_set_rate(clk[VF610_CLK_QSPI1_X2_DIV], clk_get_rate(clk[VF610_CLK_QSPI1_X4_DIV]) / 2); in vf610_clocks_init()
455 clk_set_rate(clk[VF610_CLK_QSPI1_X1_DIV], clk_get_rate(clk[VF610_CLK_QSPI1_X2_DIV]) / 2); in vf610_clocks_init()
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