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Searched refs:clk_ref (Results 1 – 17 of 17) sorted by relevance

/drivers/clk/mxs/
Dclk-ref.c23 struct clk_ref { struct
29 #define to_clk_ref(_hw) container_of(_hw, struct clk_ref, hw) argument
33 struct clk_ref *ref = to_clk_ref(hw); in clk_ref_enable()
42 struct clk_ref *ref = to_clk_ref(hw); in clk_ref_disable()
50 struct clk_ref *ref = to_clk_ref(hw); in clk_ref_recalc_rate()
86 struct clk_ref *ref = to_clk_ref(hw); in clk_ref_set_rate()
124 struct clk_ref *ref; in mxs_clk_ref()
/drivers/media/platform/samsung/s5p-mfc/
Ds5p_mfc_pm.c19 static atomic_t clk_ref; variable
52 atomic_set(&clk_ref, 0); in s5p_mfc_init_pm()
63 atomic_inc(&clk_ref); in s5p_mfc_clock_on()
64 mfc_debug(3, "+ %d\n", atomic_read(&clk_ref)); in s5p_mfc_clock_on()
71 atomic_dec(&clk_ref); in s5p_mfc_clock_off()
72 mfc_debug(3, "- %d\n", atomic_read(&clk_ref)); in s5p_mfc_clock_off()
/drivers/i2c/busses/
Di2c-pasemi-platform.c20 struct clk *clk_ref; member
27 unsigned long clk_rate = clk_get_rate(data->clk_ref); in pasemi_platform_i2c_calc_clk_div()
69 data->clk_ref = devm_clk_get_enabled(dev, NULL); in pasemi_platform_i2c_probe()
70 if (IS_ERR(data->clk_ref)) in pasemi_platform_i2c_probe()
71 return PTR_ERR(data->clk_ref); in pasemi_platform_i2c_probe()
/drivers/gpu/drm/nouveau/nvkm/engine/device/
Dtegra.c44 ret = clk_prepare_enable(tdev->clk_ref); in nvkm_device_tegra_power_up()
71 clk_disable_unprepare(tdev->clk_ref); in nvkm_device_tegra_power_up()
87 clk_disable_unprepare(tdev->clk_ref); in nvkm_device_tegra_power_down()
285 tdev->clk_ref = devm_clk_get(&pdev->dev, "ref"); in nvkm_device_tegra_new()
286 if (IS_ERR(tdev->clk_ref)) { in nvkm_device_tegra_new()
287 ret = PTR_ERR(tdev->clk_ref); in nvkm_device_tegra_new()
/drivers/rtc/
Drtc-mxc.c66 struct clk *clk_ref; member
341 pdata->clk_ref = devm_clk_get_enabled(&pdev->dev, "ref"); in mxc_rtc_probe()
342 if (IS_ERR(pdata->clk_ref)) { in mxc_rtc_probe()
344 return PTR_ERR(pdata->clk_ref); in mxc_rtc_probe()
347 rate = clk_get_rate(pdata->clk_ref); in mxc_rtc_probe()
/drivers/phy/amlogic/
Dphy-meson-g12a-usb3-pcie.c58 struct clk *clk_ref; member
410 priv->clk_ref = devm_clk_get_enabled(dev, "ref_clk"); in phy_g12a_usb3_pcie_probe()
411 if (IS_ERR(priv->clk_ref)) in phy_g12a_usb3_pcie_probe()
412 return PTR_ERR(priv->clk_ref); in phy_g12a_usb3_pcie_probe()
/drivers/clk/ti/
Ddpll44xx.c94 fint = clk_hw_get_rate(dd->clk_ref) / (dd->last_rounded_n + 1); in omap4_dpll_lpmode_recalc()
220 req->best_parent_hw = dd->clk_ref; in omap4_dpll_regm4xen_determine_rate()
Dfapll.c63 struct clk *clk_ref; member
568 fd->clk_ref = of_clk_get(node, 0); in ti_fapll_setup()
569 if (IS_ERR(fd->clk_ref)) { in ti_fapll_setup()
659 if (fd->clk_ref) in ti_fapll_setup()
660 clk_put(fd->clk_ref); in ti_fapll_setup()
Ddpll3xxx.c98 fint = clk_hw_get_rate(clk->dpll_data->clk_ref) / n; in _omap3_dpll_compute_freqsel()
318 ref_rate = clk_hw_get_rate(dd->clk_ref); in omap3_noncore_dpll_ssc_program()
550 WARN_ON(parent != dd->clk_ref); in omap3_noncore_dpll_enable()
604 req->best_parent_hw = dd->clk_ref; in omap3_noncore_dpll_determine_rate()
662 if (clk_hw_get_parent(hw) != dd->clk_ref) in omap3_noncore_dpll_set_rate()
Dclkt_dpll.c262 dpll_clk = (u64)clk_hw_get_rate(dd->clk_ref) * dpll_mult; in omap2_get_dpll_rate()
305 ref_rate = clk_hw_get_rate(dd->clk_ref); in omap2_dpll_round_rate()
Dapll.c148 ad->clk_ref = __clk_get_hw(clk); in omap_clk_register_apll()
Ddpll.c173 dd->clk_ref = __clk_get_hw(clk); in _register_dpll()
/drivers/phy/rockchip/
Dphy-rockchip-typec.c377 struct clk *clk_ref; member
734 ret = clk_prepare_enable(tcphy->clk_ref); in tcphy_phy_init()
791 clk_disable_unprepare(tcphy->clk_ref); in tcphy_phy_init()
803 clk_disable_unprepare(tcphy->clk_ref); in tcphy_phy_deinit()
1056 tcphy->clk_ref = devm_clk_get(dev, "tcpdphy-ref"); in tcphy_parse_dt()
1057 if (IS_ERR(tcphy->clk_ref)) { in tcphy_parse_dt()
1059 return PTR_ERR(tcphy->clk_ref); in tcphy_parse_dt()
/drivers/gpu/drm/nouveau/include/nvkm/core/
Dtegra.h14 struct clk *clk_ref; member
/drivers/phy/st/
Dphy-miphy28lp.c241 int clk_ref; member
250 .clk_ref = 0x1e,
259 .clk_ref = 0x1e,
268 .clk_ref = 0x1e,
396 writeb_relaxed(pll_ratio->clk_ref, base + MIPHY_PLL_CLKREF_FREQ); in miphy28lp_pll_calibration()
506 writeb_relaxed(pll_ratio->clk_ref, base + MIPHY_PLL_CLKREF_FREQ); in miphy28lp_compensation()
/drivers/net/ethernet/freescale/
Dfec.h607 struct clk *clk_ref; member
Dfec_main.c2277 ret = clk_prepare_enable(fep->clk_ref); in fec_enet_clk_enable()
2294 clk_disable_unprepare(fep->clk_ref); in fec_enet_clk_enable()
2301 if (fep->clk_ref) in fec_enet_clk_enable()
2302 clk_disable_unprepare(fep->clk_ref); in fec_enet_clk_enable()
4422 fep->clk_ref = devm_clk_get_optional(&pdev->dev, "enet_clk_ref"); in fec_probe()
4423 if (IS_ERR(fep->clk_ref)) { in fec_probe()
4424 ret = PTR_ERR(fep->clk_ref); in fec_probe()
4427 fep->clk_ref_rate = clk_get_rate(fep->clk_ref); in fec_probe()