Searched refs:ctrl_size (Results 1 – 6 of 6) sorted by relevance
/drivers/pci/endpoint/functions/ |
D | pci-epf-ntb.c | 1001 u32 spad_size, ctrl_size; in epf_ntb_config_spad_bar_alloc() local 1029 ctrl_size = sizeof(struct epf_ntb_ctrl); in epf_ntb_config_spad_bar_alloc() 1035 ctrl_size = ALIGN(ctrl_size, 8); in epf_ntb_config_spad_bar_alloc() 1036 ntb_epc->msix_table_offset = ctrl_size; in epf_ntb_config_spad_bar_alloc() 1040 ctrl_size = ctrl_size + msix_table_size + pba_size; in epf_ntb_config_spad_bar_alloc() 1044 ctrl_size = roundup_pow_of_two(ctrl_size); in epf_ntb_config_spad_bar_alloc() 1047 ctrl_size = ALIGN(ctrl_size, align); in epf_ntb_config_spad_bar_alloc() 1062 if (spad_size > ctrl_size) in epf_ntb_config_spad_bar_alloc() 1063 ctrl_size = spad_size; in epf_ntb_config_spad_bar_alloc() 1066 size = ctrl_size + spad_size; in epf_ntb_config_spad_bar_alloc() [all …]
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D | pci-epf-vntb.c | 414 u32 spad_size, ctrl_size; in epf_ntb_config_spad_bar_alloc() local 433 ctrl_size = sizeof(struct epf_ntb_ctrl); in epf_ntb_config_spad_bar_alloc() 437 ctrl_size = roundup_pow_of_two(ctrl_size); in epf_ntb_config_spad_bar_alloc() 440 ctrl_size = ALIGN(ctrl_size, align); in epf_ntb_config_spad_bar_alloc() 445 size = ctrl_size + spad_size; in epf_ntb_config_spad_bar_alloc() 446 else if (size < ctrl_size + spad_size) in epf_ntb_config_spad_bar_alloc() 458 ctrl->spad_offset = ctrl_size; in epf_ntb_config_spad_bar_alloc()
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/drivers/staging/media/sunxi/cedrus/ |
D | cedrus.c | 274 unsigned int ctrl_size; in cedrus_init_ctrls() local 285 ctrl_size = sizeof(ctrl) * CEDRUS_CONTROLS_COUNT + 1; in cedrus_init_ctrls() 287 ctx->ctrls = kzalloc(ctrl_size, GFP_KERNEL); in cedrus_init_ctrls()
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/drivers/net/ethernet/huawei/hinic/ |
D | hinic_hw_qp.c | 477 u32 ctrl_size, task_size, bufdesc_size; in sq_prepare_ctrl() local 479 ctrl_size = SIZE_8BYTES(sizeof(struct hinic_sq_ctrl)); in sq_prepare_ctrl() 487 HINIC_SQ_CTRL_SET(ctrl_size, LEN); in sq_prepare_ctrl()
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/drivers/crypto/inside-secure/ |
D | safexcel_cipher.c | 511 int ctrl_size = ctx->key_len / sizeof(u32); in safexcel_context_control() local 518 ctrl_size += ctx->state_sz / sizeof(u32); in safexcel_context_control() 523 CONTEXT_CONTROL_SIZE(ctrl_size); in safexcel_context_control() 533 CONTEXT_CONTROL_SIZE(ctrl_size); in safexcel_context_control() 536 ctrl_size += ctx->state_sz / sizeof(u32) * 2; in safexcel_context_control() 541 CONTEXT_CONTROL_SIZE(ctrl_size); in safexcel_context_control() 563 CONTEXT_CONTROL_SIZE(ctrl_size); in safexcel_context_control() 568 CONTEXT_CONTROL_SIZE(ctrl_size); in safexcel_context_control()
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/drivers/gpu/drm/msm/dsi/ |
D | dsi_host.c | 112 phys_addr_t ctrl_size; member 1862 msm_host->ctrl_base = msm_ioremap_size(pdev, "dsi_ctrl", &msm_host->ctrl_size); in msm_dsi_host_init() 2496 msm_disp_snapshot_add_block(disp_state, msm_host->ctrl_size, in msm_dsi_host_snapshot()
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