| /drivers/gpu/drm/amd/display/dc/link/protocols/ |
| D | link_dp_training.h | 63 enum dc_status dpcd_set_lane_settings(
69 enum dc_status dpcd_set_link_settings(
80 enum dc_status dp_get_lane_status_and_lane_adjust(
88 enum dc_status dpcd_configure_lttpr_mode(
92 enum dc_status configure_lttpr_mode_transparent(struct dc_link *link);
94 enum dc_status dpcd_configure_channel_coding(
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| D | link_dpcd.c | 44 static enum dc_status internal_link_read_dpcd( in internal_link_read_dpcd()
59 static enum dc_status internal_link_write_dpcd( in internal_link_write_dpcd()
196 enum dc_status core_link_read_dpcd( in core_link_read_dpcd()
208 enum dc_status status = DC_ERROR_UNEXPECTED; in core_link_read_dpcd()
229 enum dc_status core_link_write_dpcd( in core_link_write_dpcd()
237 enum dc_status status = DC_ERROR_UNEXPECTED; in core_link_write_dpcd()
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| D | link_dp_training_dpia.c | 106 enum dc_status status; in dpia_configure_link()
146 static enum dc_status core_link_send_set_config( in core_link_send_set_config()
202 static enum dc_status convert_trng_ptn_to_trng_stg(enum dc_dp_training_pattern tps, enum dpia_set_c… in convert_trng_ptn_to_trng_stg()
204 enum dc_status status = DC_OK; in convert_trng_ptn_to_trng_stg()
233 static enum dc_status dpcd_set_lt_pattern( in dpcd_set_lt_pattern()
240 enum dc_status status; in dpcd_set_lt_pattern()
294 enum dc_status status; in dpia_training_cr_non_transparent()
464 enum dc_status status; in dpia_training_cr_transparent()
620 enum dc_status status; in dpia_training_eq_non_transparent()
768 enum dc_status status; in dpia_training_eq_transparent()
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| D | link_dpcd.h | 31 enum dc_status core_link_read_dpcd(
37 enum dc_status core_link_write_dpcd(
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| D | link_dp_irq_handler.c | 48 enum dc_status dpcd_result = DC_ERROR_UNEXPECTED; in dp_parse_link_loss_status()
275 enum dc_status retval; in read_dpcd204h_on_irq_hpd()
292 enum dc_status dp_read_hpd_rx_irq_data( in dp_read_hpd_rx_irq_data()
296 static enum dc_status retval; in dp_read_hpd_rx_irq_data()
367 enum dc_status result; in dp_handle_hpd_rx_irq()
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| D | link_dp_training_128b_132b.c | 39 static enum dc_status dpcd_128b_132b_set_lane_settings( in dpcd_128b_132b_set_lane_settings()
43 enum dc_status status = core_link_write_dpcd(link, in dpcd_128b_132b_set_lane_settings()
82 enum dc_status status = DC_OK; in dp_perform_128b_132b_channel_eq_done_sequence()
162 enum dc_status status = DC_OK; in dp_perform_128b_132b_cds_done_sequence()
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| D | link_dp_training.c | 555 enum dc_status dp_get_lane_status_and_lane_adjust( in dp_get_lane_status_and_lane_adjust()
568 enum dc_status status; in dp_get_lane_status_and_lane_adjust()
858 enum dc_status configure_lttpr_mode_transparent(struct dc_link *link) in configure_lttpr_mode_transparent()
869 static enum dc_status configure_lttpr_mode_non_transparent( in configure_lttpr_mode_non_transparent()
878 enum dc_status result = DC_ERROR_UNEXPECTED; in configure_lttpr_mode_non_transparent()
936 enum dc_status dpcd_configure_lttpr_mode(struct dc_link *link, struct link_training_settings *lt_se… in dpcd_configure_lttpr_mode()
938 enum dc_status status = DC_OK; in dpcd_configure_lttpr_mode()
991 enum dc_status dpcd_configure_channel_coding(struct dc_link *link, in dpcd_configure_channel_coding()
997 enum dc_status status; in dpcd_configure_channel_coding()
1034 enum dc_status dpcd_set_link_settings( in dpcd_set_link_settings()
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| D | link_dp_dpia.c | 49 enum dc_status dpcd_get_tunneling_device_data(struct dc_link *link) in dpcd_get_tunneling_device_data()
51 enum dc_status status = DC_OK; in dpcd_get_tunneling_device_data()
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| D | link_dp_phy.c | 133 enum dc_status dp_set_fec_ready(struct dc_link *link, const struct link_resource *link_res, bool re… in dp_set_fec_ready()
141 enum dc_status status = DC_OK; in dp_set_fec_ready()
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| D | link_dp_dpia.h | 35 enum dc_status dpcd_get_tunneling_device_data(struct dc_link *link);
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| D | link_dp_irq_handler.h | 35 enum dc_status dp_read_hpd_rx_irq_data(
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| D | link_dp_phy.h | 52 enum dc_status dp_set_fec_ready(struct dc_link *link,
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| /drivers/gpu/drm/amd/display/dc/dcn20/ |
| D | dcn20_resource.h | 161 enum dc_status dcn20_build_mapped_resource(const struct dc *dc, struct dc_state *context, struct dc…
162 enum dc_status dcn20_add_stream_to_ctx(struct dc *dc, struct dc_state *new_ctx, struct dc_stream_st…
163 enum dc_status dcn20_add_dsc_to_stream_resource(struct dc *dc, struct dc_state *dc_ctx, struct dc_s…
164 enum dc_status dcn20_remove_stream_from_ctx(struct dc *dc, struct dc_state *new_ctx, struct dc_stre…
165 enum dc_status dcn20_patch_unknown_plane_state(struct dc_plane_state *plane_state);
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| /drivers/gpu/drm/amd/display/dc/inc/ |
| D | resource.h | 101 enum dc_status resource_map_pool_resources(
108 enum dc_status resource_build_scaling_params_for_context(
385 enum dc_status resource_map_clock_resources(
390 enum dc_status resource_map_phy_clock_resources(
454 enum dc_status update_dp_encoder_resources_for_test_harness(const struct dc *dc,
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| D | core_types.h | 125 enum dc_status (*validate_global)(
135 enum dc_status (*validate_plane)(
139 enum dc_status (*add_stream_to_ctx)(
144 enum dc_status (*remove_stream_from_ctx)(
148 enum dc_status (*patch_unknown_plane_state)(
181 enum dc_status (*add_dsc_to_stream_resource)(
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| D | core_status.h | 29 enum dc_status { enum
62 char *dc_status_to_str(enum dc_status status);
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| D | link.h | 140 enum dc_status (*validate_mode_timing)(
159 enum dc_status (*increase_mst_payload)(
161 enum dc_status (*reduce_mst_payload)(
234 enum dc_status (*dp_read_hpd_rx_irq_data)(
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| /drivers/gpu/drm/amd/display/dc/dce100/ |
| D | dce100_resource.h | 42 enum dc_status dce100_validate_plane(const struct dc_plane_state *plane_state, struct dc_caps *caps…
44 enum dc_status dce100_add_stream_to_ctx(
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| /drivers/gpu/drm/amd/display/dc/dce112/ |
| D | dce112_resource.h | 38 enum dc_status dce112_validate_with_context(
50 enum dc_status dce112_add_stream_to_ctx(
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| /drivers/gpu/drm/amd/display/dc/link/ |
| D | link_dpms.h | 43 enum dc_status link_increase_mst_payload(struct pipe_ctx *pipe_ctx, uint32_t req_pbn);
44 enum dc_status link_reduce_mst_payload(struct pipe_ctx *pipe_ctx, uint32_t req_pbn);
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| D | link_dpms.c | 78 enum dc_status status = DC_ERROR_UNEXPECTED; in link_blank_all_dp_displays()
101 enum dc_status status = DC_ERROR_UNEXPECTED; in link_blank_all_edp_displays()
1255 static enum dc_status deallocate_mst_payload_with_temp_drm_wa( in deallocate_mst_payload_with_temp_drm_wa()
1335 static enum dc_status deallocate_mst_payload(struct pipe_ctx *pipe_ctx) in deallocate_mst_payload()
1439 static enum dc_status allocate_mst_payload(struct pipe_ctx *pipe_ctx) in allocate_mst_payload()
1667 static enum dc_status update_sst_payload(struct pipe_ctx *pipe_ctx, in update_sst_payload()
1750 enum dc_status link_reduce_mst_payload(struct pipe_ctx *pipe_ctx, uint32_t bw_in_kbps) in link_reduce_mst_payload()
1839 enum dc_status link_increase_mst_payload(struct pipe_ctx *pipe_ctx, uint32_t bw_in_kbps) in link_increase_mst_payload()
2043 static enum dc_status enable_link_dp(struct dc_state *state, in enable_link_dp()
2047 enum dc_status status; in enable_link_dp()
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| D | link_validation.h | 28 enum dc_status link_validate_mode_timing(
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| /drivers/gpu/drm/amd/display/dc/dcn10/ |
| D | dcn10_hw_sequencer.h | 43 enum dc_status dcn10_enable_stream_timing(
108 enum dc_status dce110_apply_ctx_to_hw(
179 enum dc_status dcn10_set_clock(struct dc *dc,
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| /drivers/gpu/drm/amd/display/dc/ |
| D | dc_stream.h | 418 enum dc_status dc_add_stream_to_ctx(
423 enum dc_status dc_remove_stream_from_ctx(
461 enum dc_status dc_stream_add_dsc_to_resource(struct dc *dc,
475 enum dc_status dc_validate_stream(struct dc *dc, struct dc_stream_state *stream);
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| D | dc.h | 1369 enum dc_status dc_validate_plane(struct dc *dc, const struct dc_plane_state *plane_state);
1373 enum dc_status dc_validate_with_context(struct dc *dc,
1386 enum dc_status dc_validate_global_state(
1414 enum dc_status dc_commit_streams(struct dc *dc,
1776 enum dc_status dc_link_dp_read_hpd_rx_irq_data(
2243 enum dc_status dc_set_clock(struct dc *dc, enum dc_clock_type clock_type, uint32_t clk_khz, uint32_…
2293 enum dc_status dc_process_dmub_set_mst_slots(const struct dc *dc,
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