/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/ |
D | dcn31_clk_mgr.c | 79 int i, display_count; in dcn31_get_active_display_cnt_wa() local 82 display_count = 0; in dcn31_get_active_display_cnt_wa() 93 display_count++; in dcn31_get_active_display_cnt_wa() 103 display_count++; in dcn31_get_active_display_cnt_wa() 107 if (display_count == 0 && tmds_present) in dcn31_get_active_display_cnt_wa() 108 display_count = 1; in dcn31_get_active_display_cnt_wa() 110 return display_count; in dcn31_get_active_display_cnt_wa() 141 int display_count; in dcn31_update_clocks() local 167 display_count = dcn31_get_active_display_cnt_wa(dc, context); in dcn31_update_clocks() 169 if (display_count == 0) { in dcn31_update_clocks() [all …]
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/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/ |
D | rn_clk_mgr.c | 57 int i, display_count; in rn_get_active_display_cnt_wa() local 60 display_count = 0; in rn_get_active_display_cnt_wa() 76 display_count++; in rn_get_active_display_cnt_wa() 80 if (display_count == 0 && tmds_present) in rn_get_active_display_cnt_wa() 81 display_count = 1; in rn_get_active_display_cnt_wa() 83 return display_count; in rn_get_active_display_cnt_wa() 88 int display_count; in rn_set_low_power_state() local 95 display_count = rn_get_active_display_cnt_wa(dc, context); in rn_set_low_power_state() 98 if (display_count == 0) { in rn_set_low_power_state() 138 int display_count; in rn_update_clocks() local [all …]
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/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/ |
D | dcn316_clk_mgr.c | 73 int i, display_count; in dcn316_get_active_display_cnt_wa() local 76 display_count = 0; in dcn316_get_active_display_cnt_wa() 92 display_count++; in dcn316_get_active_display_cnt_wa() 96 if (display_count == 0 && tmds_present) in dcn316_get_active_display_cnt_wa() 97 display_count = 1; in dcn316_get_active_display_cnt_wa() 99 return display_count; in dcn316_get_active_display_cnt_wa() 143 int display_count; in dcn316_update_clocks() local 163 display_count = dcn316_get_active_display_cnt_wa(dc, context); in dcn316_update_clocks() 165 if (display_count == 0) { in dcn316_update_clocks()
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/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/ |
D | vg_clk_mgr.c | 66 int i, display_count; in vg_get_active_display_cnt_wa() local 69 display_count = 0; in vg_get_active_display_cnt_wa() 85 display_count++; in vg_get_active_display_cnt_wa() 89 if (display_count == 0 && tmds_present) in vg_get_active_display_cnt_wa() 90 display_count = 1; in vg_get_active_display_cnt_wa() 92 return display_count; in vg_get_active_display_cnt_wa() 102 int display_count; in vg_update_clocks() local 118 display_count = vg_get_active_display_cnt_wa(dc, context); in vg_update_clocks() 120 if (display_count == 0) { in vg_update_clocks()
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/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/ |
D | dcn315_clk_mgr.c | 61 int i, display_count; in dcn315_get_active_display_cnt_wa() local 64 display_count = 0; in dcn315_get_active_display_cnt_wa() 80 display_count++; in dcn315_get_active_display_cnt_wa() 84 if (display_count == 0 && tmds_present) in dcn315_get_active_display_cnt_wa() 85 display_count = 1; in dcn315_get_active_display_cnt_wa() 87 return display_count; in dcn315_get_active_display_cnt_wa() 133 int display_count; in dcn315_update_clocks() local 154 display_count = dcn315_get_active_display_cnt_wa(dc, context); in dcn315_update_clocks() 156 if (display_count == 0) { in dcn315_update_clocks()
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/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/ |
D | rv1_clk_mgr.c | 201 int display_count; in rv1_update_clocks() local 212 display_count = clk_mgr_helper_get_active_display_cnt(dc, context); in rv1_update_clocks() 214 if (display_count == 0) in rv1_update_clocks() 224 pp_smu->set_display_count(&pp_smu->pp_smu, display_count); in rv1_update_clocks()
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/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/ |
D | dcn314_clk_mgr.c | 100 int i, display_count; in dcn314_get_active_display_cnt_wa() local 103 display_count = 0; in dcn314_get_active_display_cnt_wa() 114 display_count++; in dcn314_get_active_display_cnt_wa() 124 display_count++; in dcn314_get_active_display_cnt_wa() 128 if (display_count == 0 && tmds_present) in dcn314_get_active_display_cnt_wa() 129 display_count = 1; in dcn314_get_active_display_cnt_wa() 131 return display_count; in dcn314_get_active_display_cnt_wa() 168 int display_count; in dcn314_update_clocks() local 194 display_count = dcn314_get_active_display_cnt_wa(dc, context); in dcn314_update_clocks() 196 if (display_count == 0) { in dcn314_update_clocks()
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/drivers/gpu/drm/amd/display/dc/clk_mgr/ |
D | clk_mgr.c | 56 int i, display_count; in clk_mgr_helper_get_active_display_cnt() local 58 display_count = 0; in clk_mgr_helper_get_active_display_cnt() 75 display_count++; in clk_mgr_helper_get_active_display_cnt() 78 return display_count; in clk_mgr_helper_get_active_display_cnt()
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/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/ |
D | dcn30_clk_mgr.c | 199 int display_count; in dcn3_update_clocks() local 222 display_count = clk_mgr_helper_get_active_display_cnt(dc, context); in dcn3_update_clocks() 224 if (display_count == 0) in dcn3_update_clocks() 228 dcn30_smu_set_num_of_displays(clk_mgr, display_count); in dcn3_update_clocks()
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/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/ |
D | dcn20_clk_mgr.c | 224 int display_count; in dcn2_update_clocks() local 246 display_count = clk_mgr_helper_get_active_display_cnt(dc, context); in dcn2_update_clocks() 250 if (display_count == 0) in dcn2_update_clocks() 255 pp_smu->set_display_count(&pp_smu->pp_smu, display_count); in dcn2_update_clocks()
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/drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/ |
D | dce110_clk_mgr.c | 169 pp_display_cfg->display_count = num_cfgs; in dce110_fill_display_configs() 236 if (pp_display_cfg->display_count == 1) { in dce11_pplib_apply_display_requirements()
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/drivers/gpu/drm/amd/display/amdgpu_dm/ |
D | amdgpu_dm_pp_smu.c | 61 pp_display_cfg->display_count; in dm_pp_apply_display_requirements() 63 pp_display_cfg->display_count; in dm_pp_apply_display_requirements() 96 for (i = 0; i < pp_display_cfg->display_count; i++) { in dm_pp_apply_display_requirements()
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/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/ |
D | dcn32_clk_mgr.c | 461 int display_count; in dcn32_update_clocks() local 485 display_count = clk_mgr_helper_get_active_display_cnt(dc, context); in dcn32_update_clocks() 487 if (display_count == 0) in dcn32_update_clocks() 492 dcn30_smu_set_num_of_displays(clk_mgr, display_count); in dcn32_update_clocks()
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/drivers/gpu/drm/amd/display/dc/ |
D | dm_services_types.h | 203 uint8_t display_count; member
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/drivers/gpu/drm/amd/display/dc/dce/ |
D | dce_clk_mgr.c | 545 pp_display_cfg->display_count = num_cfgs; in dce110_fill_display_configs() 659 if (pp_display_cfg->display_count == 1) { in dce11_pplib_apply_display_requirements()
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