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Searched refs:div_hw (Results 1 – 14 of 14) sorted by relevance

/drivers/clk/actions/
Dowl-divider.c17 const struct owl_divider_hw *div_hw, in owl_divider_helper_round_rate() argument
22 div_hw->table, div_hw->width, in owl_divider_helper_round_rate()
23 div_hw->div_flags); in owl_divider_helper_round_rate()
31 return owl_divider_helper_round_rate(&div->common, &div->div_hw, in owl_divider_round_rate()
36 const struct owl_divider_hw *div_hw, in owl_divider_helper_recalc_rate() argument
42 regmap_read(common->regmap, div_hw->reg, &reg); in owl_divider_helper_recalc_rate()
43 val = reg >> div_hw->shift; in owl_divider_helper_recalc_rate()
44 val &= (1 << div_hw->width) - 1; in owl_divider_helper_recalc_rate()
47 val, div_hw->table, in owl_divider_helper_recalc_rate()
48 div_hw->div_flags, in owl_divider_helper_recalc_rate()
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Dowl-divider.h25 struct owl_divider_hw div_hw; member
41 .div_hw = OWL_DIVIDER_HW(_reg, _shift, _width, \
60 const struct owl_divider_hw *div_hw,
65 const struct owl_divider_hw *div_hw,
69 const struct owl_divider_hw *div_hw,
Dowl-composite.h22 struct owl_divider_hw div_hw; member
42 .rate.div_hw = _div, \
56 .rate.div_hw = _div, \
Dowl-composite.c62 rate = owl_divider_helper_round_rate(&comp->common, &comp->rate.div_hw, in owl_comp_div_determine_rate()
76 return owl_divider_helper_recalc_rate(&comp->common, &comp->rate.div_hw, in owl_comp_div_recalc_rate()
85 return owl_divider_helper_set_rate(&comp->common, &comp->rate.div_hw, in owl_comp_div_set_rate()
/drivers/clk/tegra/
Dclk-periph.c41 struct clk_hw *div_hw = &periph->divider.hw; in clk_periph_recalc_rate() local
43 __clk_hw_set_clk(div_hw, hw); in clk_periph_recalc_rate()
45 return div_ops->recalc_rate(div_hw, parent_rate); in clk_periph_recalc_rate()
53 struct clk_hw *div_hw = &periph->divider.hw; in clk_periph_determine_rate() local
56 __clk_hw_set_clk(div_hw, hw); in clk_periph_determine_rate()
58 rate = div_ops->round_rate(div_hw, req->rate, &req->best_parent_rate); in clk_periph_determine_rate()
71 struct clk_hw *div_hw = &periph->divider.hw; in clk_periph_set_rate() local
73 __clk_hw_set_clk(div_hw, hw); in clk_periph_set_rate()
75 return div_ops->set_rate(div_hw, rate, parent_rate); in clk_periph_set_rate()
122 struct clk_hw *div_hw = &periph->divider.hw; in clk_periph_restore_context() local
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Dclk-super.c149 struct clk_hw *div_hw = &super->frac_div.hw; in clk_super_determine_rate() local
152 __clk_hw_set_clk(div_hw, hw); in clk_super_determine_rate()
154 rate = super->div_ops->round_rate(div_hw, req->rate, in clk_super_determine_rate()
167 struct clk_hw *div_hw = &super->frac_div.hw; in clk_super_recalc_rate() local
169 __clk_hw_set_clk(div_hw, hw); in clk_super_recalc_rate()
171 return super->div_ops->recalc_rate(div_hw, parent_rate); in clk_super_recalc_rate()
178 struct clk_hw *div_hw = &super->frac_div.hw; in clk_super_set_rate() local
180 __clk_hw_set_clk(div_hw, hw); in clk_super_set_rate()
182 return super->div_ops->set_rate(div_hw, rate, parent_rate); in clk_super_set_rate()
188 struct clk_hw *div_hw = &super->frac_div.hw; in clk_super_restore_context() local
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/drivers/clk/
Dclk-bm1880.c592 struct bm1880_div_hw_clock *div_hw = to_bm1880_div_clk(hw); in bm1880_clk_div_recalc_rate() local
593 struct bm1880_div_clock *div = &div_hw->div; in bm1880_clk_div_recalc_rate()
594 void __iomem *reg_addr = div_hw->base + div->reg; in bm1880_clk_div_recalc_rate()
614 struct bm1880_div_hw_clock *div_hw = to_bm1880_div_clk(hw); in bm1880_clk_div_round_rate() local
615 struct bm1880_div_clock *div = &div_hw->div; in bm1880_clk_div_round_rate()
616 void __iomem *reg_addr = div_hw->base + div->reg; in bm1880_clk_div_round_rate()
636 struct bm1880_div_hw_clock *div_hw = to_bm1880_div_clk(hw); in bm1880_clk_div_set_rate() local
637 struct bm1880_div_clock *div = &div_hw->div; in bm1880_clk_div_set_rate()
638 void __iomem *reg_addr = div_hw->base + div->reg; in bm1880_clk_div_set_rate()
644 div->width, div_hw->div.flags); in bm1880_clk_div_set_rate()
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Dclk-stm32h7.c351 struct clk_hw *div_hw; member
368 struct clk_hw *div_hw; in get_cfg_composite_div() local
372 mux_hw = div_hw = gate_hw = NULL; in get_cfg_composite_div()
394 div_hw = &div->hw; in get_cfg_composite_div()
415 composite->div_hw = div_hw; in get_cfg_composite_div()
1326 c_cfg.div_hw, c_cfg.div_ops, in stm32h7_rcc_init()
1349 c_cfg.div_hw, c_cfg.div_ops, in stm32h7_rcc_init()
1364 c_cfg.div_hw, c_cfg.div_ops, in stm32h7_rcc_init()
1378 c_cfg.div_hw, c_cfg.div_ops, in stm32h7_rcc_init()
Dclk-stm32mp1.c629 struct clk_hw *mux_hw, *div_hw, *gate_hw; in clk_stm32_register_composite() local
632 div_hw = NULL; in clk_stm32_register_composite()
650 div_hw = _get_stm32_div(dev, base, cfg->div, lock); in clk_stm32_register_composite()
652 if (!IS_ERR(div_hw)) { in clk_stm32_register_composite()
672 mux_hw, mux_ops, div_hw, div_ops, in clk_stm32_register_composite()
/drivers/clk/imx/
Dclk-composite-93.c189 struct clk_hw *div_hw, *gate_hw; in imx93_clk_composite_flags() local
210 div_hw = &div->hw; in imx93_clk_composite_flags()
223 mux_hw, &clk_mux_ro_ops, div_hw, in imx93_clk_composite_flags()
237 mux_hw, &imx93_clk_composite_mux_ops, div_hw, in imx93_clk_composite_flags()
243 mux_hw, &imx93_clk_composite_mux_ops, div_hw, in imx93_clk_composite_flags()
Dclk-composite-8m.c214 struct clk_hw *div_hw, *gate_hw = NULL; in __imx8m_clk_hw_composite() local
235 div_hw = &div->hw; in __imx8m_clk_hw_composite()
272 mux_hw, mux_ops, div_hw, in __imx8m_clk_hw_composite()
/drivers/clk/nxp/
Dclk-lpc18xx-ccu.c208 struct clk_hw *div_hw = NULL; in lpc18xx_ccu_register_branch_gate_div() local
220 div_hw = &div->hw; in lpc18xx_ccu_register_branch_gate_div()
229 div_hw, div_ops, in lpc18xx_ccu_register_branch_gate_div()
Dclk-lpc32xx.c1434 struct clk_hw *mux_hw = NULL, *div_hw = NULL, *gate_hw = NULL; in lpc32xx_clk_register() local
1447 div_hw = &div0->clk.hw; in lpc32xx_clk_register()
1456 mux_hw, mops, div_hw, dops, in lpc32xx_clk_register()
/drivers/clk/mediatek/
Dclk-mtk.c225 struct clk_hw *mux_hw = NULL, *gate_hw = NULL, *div_hw = NULL; in mtk_clk_register_composite() local
281 div_hw = &div->hw; in mtk_clk_register_composite()
287 div_hw, div_ops, in mtk_clk_register_composite()