Searched refs:dmc_id (Results 1 – 2 of 2) sorted by relevance
| /drivers/gpu/drm/i915/display/ |
| D | intel_dmc_regs.h | 27 #define __PIPEDMC_REG_MMIO_BASE(i915, dmc_id) \ argument
30 0x400 * ((dmc_id) - 1))
34 #define _DMC_REG_MMIO_BASE(i915, dmc_id) \ argument
35 ((dmc_id) == DMC_FW_MAIN ? __DMC_REG_MMIO_BASE : \
36 __PIPEDMC_REG_MMIO_BASE(i915, dmc_id))
38 #define _DMC_REG(i915, dmc_id, reg) \ argument
39 ((reg) - __DMC_REG_MMIO_BASE + _DMC_REG_MMIO_BASE(i915, dmc_id))
45 #define DMC_EVT_HTP(i915, dmc_id, handler) \ argument
46 _MMIO(_DMC_REG(i915, dmc_id, _DMC_EVT_HTP_0) + 4 * (handler))
50 #define DMC_EVT_CTL(i915, dmc_id, handler) \ argument
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| D | intel_dmc.c | 196 u8 dmc_id; member
291 static bool is_valid_dmc_id(enum intel_dmc_id dmc_id) in is_valid_dmc_id() argument
293 return dmc_id >= DMC_FW_MAIN && dmc_id < DMC_FW_MAX; in is_valid_dmc_id()
296 static bool has_dmc_id_fw(struct drm_i915_private *i915, enum intel_dmc_id dmc_id) in has_dmc_id_fw() argument
300 return dmc && dmc->dmc_info[dmc_id].payload; in has_dmc_id_fw()
364 get_flip_queue_event_regs(struct drm_i915_private *i915, enum intel_dmc_id dmc_id, in get_flip_queue_event_regs() argument
367 if (dmc_id == DMC_FW_MAIN) { in get_flip_queue_event_regs()
369 *ctl_reg = DMC_EVT_CTL(i915, dmc_id, 3); in get_flip_queue_event_regs()
370 *htp_reg = DMC_EVT_HTP(i915, dmc_id, 3); in get_flip_queue_event_regs()
374 } else if (dmc_id >= DMC_FW_PIPEA && dmc_id <= DMC_FW_PIPED) { in get_flip_queue_event_regs()
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