| /drivers/gpu/drm/msm/dp/ |
| D | dp_panel.c | 346 dp_catalog_panel_tpg_enable(catalog, &panel->dp_panel.dp_mode.drm_mode); in dp_panel_tpg_config()
365 struct drm_display_mode *drm_mode; in dp_panel_timing_cfg() local
369 drm_mode = &panel->dp_panel.dp_mode.drm_mode; in dp_panel_timing_cfg()
372 drm_mode->hdisplay, drm_mode->htotal - drm_mode->hsync_end, in dp_panel_timing_cfg()
373 drm_mode->hsync_start - drm_mode->hdisplay, in dp_panel_timing_cfg()
374 drm_mode->hsync_end - drm_mode->hsync_start); in dp_panel_timing_cfg()
377 drm_mode->vdisplay, drm_mode->vtotal - drm_mode->vsync_end, in dp_panel_timing_cfg()
378 drm_mode->vsync_start - drm_mode->vdisplay, in dp_panel_timing_cfg()
379 drm_mode->vsync_end - drm_mode->vsync_start); in dp_panel_timing_cfg()
381 total_hor = drm_mode->htotal; in dp_panel_timing_cfg()
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| D | dp_debug.c | 38 const struct drm_display_mode *drm_mode; in dp_debug_show() local
43 drm_mode = &debug->panel->dp_mode.drm_mode; in dp_debug_show()
53 drm_mode->hdisplay, in dp_debug_show()
54 drm_mode->vdisplay); in dp_debug_show()
56 drm_mode->htotal - drm_mode->hsync_end, in dp_debug_show()
57 drm_mode->vtotal - drm_mode->vsync_end); in dp_debug_show()
59 drm_mode->hsync_start - drm_mode->hdisplay, in dp_debug_show()
60 drm_mode->vsync_start - drm_mode->vdisplay); in dp_debug_show()
62 drm_mode->hsync_end - drm_mode->hsync_start, in dp_debug_show()
63 drm_mode->vsync_end - drm_mode->vsync_start); in dp_debug_show()
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| D | dp_catalog.c | 902 struct drm_display_mode *drm_mode) in dp_catalog_panel_tpg_enable() argument
914 hsync_period = drm_mode->htotal; in dp_catalog_panel_tpg_enable()
915 vsync_period = drm_mode->vtotal; in dp_catalog_panel_tpg_enable()
917 display_v_start = ((drm_mode->vtotal - drm_mode->vsync_start) * in dp_catalog_panel_tpg_enable()
919 display_v_end = ((vsync_period - (drm_mode->vsync_start - in dp_catalog_panel_tpg_enable()
920 drm_mode->vdisplay)) in dp_catalog_panel_tpg_enable()
923 display_v_start += drm_mode->htotal - drm_mode->hsync_start; in dp_catalog_panel_tpg_enable()
924 display_v_end -= (drm_mode->hsync_start - drm_mode->hdisplay); in dp_catalog_panel_tpg_enable()
926 hsync_start_x = drm_mode->htotal - drm_mode->hsync_start; in dp_catalog_panel_tpg_enable()
927 hsync_end_x = hsync_period - (drm_mode->hsync_start - in dp_catalog_panel_tpg_enable()
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| D | dp_ctrl.c | 945 struct drm_display_mode *drm_mode; in dp_ctrl_calc_tu_parameters() local
947 drm_mode = &ctrl->panel->dp_mode.drm_mode; in dp_ctrl_calc_tu_parameters()
950 in.pclk_khz = drm_mode->clock; in dp_ctrl_calc_tu_parameters()
951 in.hactive = drm_mode->hdisplay; in dp_ctrl_calc_tu_parameters()
952 in.hporch = drm_mode->htotal - drm_mode->hdisplay; in dp_ctrl_calc_tu_parameters()
1653 pixel_rate = ctrl->panel->dp_mode.drm_mode.clock; in dp_ctrl_process_phy_test_request()
1750 pixel_rate = ctrl->panel->dp_mode.drm_mode.clock; in dp_ctrl_on_link()
1876 pixel_rate = pixel_rate_orig = ctrl->panel->dp_mode.drm_mode.clock; in dp_ctrl_on_stream()
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| D | dp_panel.h | 22 struct drm_display_mode drm_mode; member
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| D | dp_display.c | 841 drm_mode_copy(&dp->panel->dp_mode.drm_mode, &mode->drm_mode); in dp_display_set_mode()
1608 if (!dp_display->dp_mode.drm_mode.clock) { in dp_bridge_atomic_enable()
1720 drm_mode_copy(&dp_display->dp_mode.drm_mode, adjusted_mode); in dp_bridge_mode_set()
1723 !!(dp_display->dp_mode.drm_mode.flags & DRM_MODE_FLAG_NVSYNC); in dp_bridge_mode_set()
1726 !!(dp_display->dp_mode.drm_mode.flags & DRM_MODE_FLAG_NHSYNC); in dp_bridge_mode_set()
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| D | dp_catalog.h | 129 struct drm_display_mode *drm_mode);
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| /drivers/gpu/drm/ |
| D | drm_modes.c | 635 struct drm_display_mode *drm_mode; in drm_cvt_mode() local
647 drm_mode = drm_mode_create(dev); in drm_cvt_mode()
648 if (!drm_mode) in drm_cvt_mode()
671 drm_mode->hdisplay = hdisplay_rnd + 2 * hmargin; in drm_cvt_mode()
684 drm_mode->vdisplay = vdisplay + 2 * vmargin; in drm_cvt_mode()
733 drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + in drm_cvt_mode()
753 hblank = drm_mode->hdisplay * hblank_percentage / in drm_cvt_mode()
757 drm_mode->htotal = drm_mode->hdisplay + hblank; in drm_cvt_mode()
758 drm_mode->hsync_end = drm_mode->hdisplay + hblank / 2; in drm_cvt_mode()
759 drm_mode->hsync_start = drm_mode->hsync_end - in drm_cvt_mode()
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| /drivers/gpu/drm/panel/ |
| D | panel-samsung-s6d7aa0.c | 39 const struct drm_display_mode *drm_mode; member
310 .drm_mode = &s6d7aa0_lsl080al02_mode,
413 .drm_mode = &s6d7aa0_lsl080al03_mode,
441 .drm_mode = &s6d7aa0_ltl101at01_mode,
459 mode = drm_mode_duplicate(connector->dev, ctx->desc->drm_mode); in s6d7aa0_get_modes()
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| /drivers/gpu/drm/i2c/ |
| D | ch7006_mode.c | 174 const struct drm_display_mode *drm_mode) in ch7006_lookup_mode() argument
184 if (mode->mode.hdisplay != drm_mode->hdisplay || in ch7006_lookup_mode()
185 mode->mode.vdisplay != drm_mode->vdisplay || in ch7006_lookup_mode()
186 mode->mode.vtotal != drm_mode->vtotal || in ch7006_lookup_mode()
187 mode->mode.htotal != drm_mode->htotal || in ch7006_lookup_mode()
188 mode->mode.clock != drm_mode->clock) in ch7006_lookup_mode()
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| D | ch7006_drv.c | 116 struct drm_display_mode *drm_mode, in ch7006_encoder_mode_set() argument
143 start_active = (drm_mode->htotal & ~0x7) - (drm_mode->hsync_start & ~0x7); in ch7006_encoder_mode_set()
152 if (drm_mode->flags & DRM_MODE_FLAG_PVSYNC) in ch7006_encoder_mode_set()
154 if (drm_mode->flags & DRM_MODE_FLAG_PHSYNC) in ch7006_encoder_mode_set()
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| D | ch7006_priv.h | 113 const struct drm_display_mode *drm_mode);
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| /drivers/gpu/drm/amd/display/amdgpu_dm/ |
| D | amdgpu_dm.h | 832 const struct drm_display_mode *drm_mode,
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| D | amdgpu_dm.c | 5625 decide_crtc_timing_for_drm_display_mode(struct drm_display_mode *drm_mode, in decide_crtc_timing_for_drm_display_mode() argument
5630 copy_crtc_timing_for_drm_display_mode(native_mode, drm_mode); in decide_crtc_timing_for_drm_display_mode()
5631 } else if (native_mode->clock == drm_mode->clock && in decide_crtc_timing_for_drm_display_mode()
5632 native_mode->htotal == drm_mode->htotal && in decide_crtc_timing_for_drm_display_mode()
5633 native_mode->vtotal == drm_mode->vtotal) { in decide_crtc_timing_for_drm_display_mode()
5634 copy_crtc_timing_for_drm_display_mode(native_mode, drm_mode); in decide_crtc_timing_for_drm_display_mode()
6001 const struct drm_display_mode *drm_mode, in create_stream_for_sink() argument
6023 drm_mode_init(&mode, drm_mode); in create_stream_for_sink()
6573 const struct drm_display_mode *drm_mode, in create_validate_stream_for_sink() argument
6585 stream = create_stream_for_sink(aconnector, drm_mode, in create_validate_stream_for_sink()
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| /drivers/gpu/drm/nouveau/dispnv04/ |
| D | tvnv17.c | 465 struct drm_display_mode *drm_mode, in nv17_tv_mode_set() argument
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