Searched refs:drm_mode_set_crtcinfo (Results 1 – 25 of 29) sorted by relevance
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| /drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_encoders.c | 190 drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V); in amdgpu_panel_mode_fixup()
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| D | atombios_encoders.c | 286 drm_mode_set_crtcinfo(adjusted_mode, 0); in amdgpu_atombios_encoder_mode_fixup()
2026 drm_mode_set_crtcinfo(&lvds->native_mode, CRTC_INTERLACE_HALVE_V); in amdgpu_atombios_encoder_get_lcd_info()
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| D | amdgpu_connectors.c | 648 drm_mode_set_crtcinfo(native_mode, CRTC_INTERLACE_HALVE_V); in amdgpu_connector_fixup_lcd_native_mode()
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| /drivers/gpu/drm/ |
| D | drm_modes.c | 1323 drm_mode_set_crtcinfo(&adjusted, CRTC_STEREO_DOUBLE_ONLY); in drm_mode_get_hv_timing()
1344 void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags) in drm_mode_set_crtcinfo() function
1406 EXPORT_SYMBOL(drm_mode_set_crtcinfo);
2567 drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V); in drm_mode_create_from_cmdline_mode()
2696 drm_mode_set_crtcinfo(out, CRTC_INTERLACE_HALVE_V); in drm_mode_convert_umode()
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| D | drm_probe_helper.c | 702 drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V); in drm_helper_probe_single_connector_modes()
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| /drivers/gpu/drm/radeon/ |
| D | radeon_encoders.c | 349 drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V); in radeon_panel_mode_fixup()
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| D | radeon_legacy_encoders.c | 264 drm_mode_set_crtcinfo(adjusted_mode, 0); in radeon_legacy_mode_fixup()
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| D | radeon_connectors.c | 770 drm_mode_set_crtcinfo(native_mode, CRTC_INTERLACE_HALVE_V); in radeon_fixup_lvds_native_mode()
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| D | atombios_encoders.c | 305 drm_mode_set_crtcinfo(adjusted_mode, 0); in radeon_atom_mode_fixup()
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| /drivers/gpu/drm/gma500/ |
| D | oaktrail_lvds.c | 281 drm_mode_set_crtcinfo(mode_dev->panel_fixed_mode, 0); in oaktrail_lvds_get_configuration_mode()
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| D | cdv_intel_lvds.c | 216 drm_mode_set_crtcinfo(adjusted_mode, in cdv_intel_lvds_mode_fixup()
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| D | psb_intel_display.c | 421 drm_mode_set_crtcinfo(mode, 0); in psb_intel_crtc_mode_get()
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| D | psb_intel_lvds.c | 411 drm_mode_set_crtcinfo(adjusted_mode, in psb_intel_lvds_mode_fixup()
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| D | cdv_intel_display.c | 956 drm_mode_set_crtcinfo(mode, 0); in cdv_intel_crtc_mode_get()
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| D | psb_intel_sdvo.c | 946 drm_mode_set_crtcinfo(adjusted_mode, 0); in psb_intel_sdvo_set_input_timings_for_mode()
1541 drm_mode_set_crtcinfo(psb_intel_sdvo->sdvo_lvds_fixed_mode, in psb_intel_sdvo_get_lvds_modes()
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| D | cdv_intel_dp.c | 888 drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V); in cdv_intel_fixed_panel_mode()
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| /drivers/gpu/drm/arm/display/komeda/ |
| D | komeda_crtc.c | 468 drm_mode_set_crtcinfo(adjusted_mode, 0); in komeda_crtc_mode_fixup()
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| /drivers/gpu/drm/i915/display/ |
| D | intel_tv.c | 1230 drm_mode_set_crtcinfo(adjusted_mode, 0); in intel_tv_compute_config()
1347 drm_mode_set_crtcinfo(adjusted_mode, 0); in intel_tv_compute_config()
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| D | intel_panel.c | 254 drm_mode_set_crtcinfo(adjusted_mode, 0); in intel_panel_compute_config()
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| D | intel_sdvo.c | 920 drm_mode_set_crtcinfo(&mode, 0); in intel_sdvo_get_mode_from_dtd()
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| /drivers/gpu/drm/omapdrm/dss/ |
| D | venc.c | 587 drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V); in venc_bridge_mode_fixup()
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| /drivers/gpu/drm/nouveau/dispnv50/ |
| D | head.c | 289 drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V | CRTC_STEREO_DOUBLE); in nv50_head_atomic_check_mode()
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| /drivers/gpu/drm/armada/ |
| D | armada_crtc.c | 209 drm_mode_set_crtcinfo(adj, CRTC_INTERLACE_HALVE_V); in armada_drm_crtc_mode_fixup()
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| /drivers/gpu/drm/exynos/ |
| D | exynos_hdmi.c | 1001 drm_mode_set_crtcinfo(adjusted_mode, 0); in hdmi_mode_fixup()
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| /drivers/gpu/drm/rockchip/ |
| D | rockchip_drm_vop2.c | 1352 drm_mode_set_crtcinfo(adj_mode, CRTC_INTERLACE_HALVE_V | in vop2_crtc_mode_fixup()
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