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Searched refs:drm_printf (Results 1 – 25 of 76) sorted by relevance

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/drivers/gpu/drm/amd/amdgpu/
Damdgpu_fdinfo.c89 drm_printf(p, "pasid:\t%u\n", fpriv->vm.pasid); in amdgpu_show_fdinfo()
90 drm_printf(p, "drm-driver:\t%s\n", file->minor->dev->driver->name); in amdgpu_show_fdinfo()
91 drm_printf(p, "drm-pdev:\t%04x:%02x:%02x.%d\n", domain, bus, dev, fn); in amdgpu_show_fdinfo()
92 drm_printf(p, "drm-client-id:\t%llu\n", vm->immediate.fence_context); in amdgpu_show_fdinfo()
93 drm_printf(p, "drm-memory-vram:\t%llu KiB\n", stats.vram/1024UL); in amdgpu_show_fdinfo()
94 drm_printf(p, "drm-memory-gtt: \t%llu KiB\n", stats.gtt/1024UL); in amdgpu_show_fdinfo()
95 drm_printf(p, "drm-memory-cpu: \t%llu KiB\n", stats.cpu/1024UL); in amdgpu_show_fdinfo()
96 drm_printf(p, "amd-memory-visible-vram:\t%llu KiB\n", in amdgpu_show_fdinfo()
98 drm_printf(p, "amd-evicted-vram:\t%llu KiB\n", in amdgpu_show_fdinfo()
100 drm_printf(p, "amd-evicted-visible-vram:\t%llu KiB\n", in amdgpu_show_fdinfo()
[all …]
/drivers/gpu/drm/i915/
Dintel_device_info.c97 drm_printf(p, "graphics version: %u.%02u\n", in intel_device_info_print()
101 drm_printf(p, "graphics version: %u\n", in intel_device_info_print()
105 drm_printf(p, "media version: %u.%02u\n", in intel_device_info_print()
109 drm_printf(p, "media version: %u\n", in intel_device_info_print()
112 drm_printf(p, "graphics stepping: %s\n", intel_step_name(runtime->step.graphics_step)); in intel_device_info_print()
113 drm_printf(p, "media stepping: %s\n", intel_step_name(runtime->step.media_step)); in intel_device_info_print()
114 drm_printf(p, "display stepping: %s\n", intel_step_name(runtime->step.display_step)); in intel_device_info_print()
115 drm_printf(p, "base die stepping: %s\n", intel_step_name(runtime->step.basedie_step)); in intel_device_info_print()
117 drm_printf(p, "gt: %d\n", info->gt); in intel_device_info_print()
118 drm_printf(p, "memory-regions: 0x%x\n", info->memory_regions); in intel_device_info_print()
[all …]
Di915_params.c234 drm_printf(p, "i915.%s=%s\n", name, str_yes_no(val)); in _param_print_bool()
240 drm_printf(p, "i915.%s=%d\n", name, val); in _param_print_int()
246 drm_printf(p, "i915.%s=%u\n", name, val); in _param_print_uint()
252 drm_printf(p, "i915.%s=%lu\n", name, val); in _param_print_ulong()
258 drm_printf(p, "i915.%s=%s\n", name, val); in _param_print_charp()
Di915_ttm_buddy_manager.c247 drm_printf(printer, "default_page_size: %lluKiB\n", in i915_ttm_buddy_man_debug()
249 drm_printf(printer, "visible_avail: %lluMiB\n", in i915_ttm_buddy_man_debug()
251 drm_printf(printer, "visible_size: %lluMiB\n", in i915_ttm_buddy_man_debug()
253 drm_printf(printer, "visible_reserved: %lluMiB\n", in i915_ttm_buddy_man_debug()
258 drm_printf(printer, "reserved:\n"); in i915_ttm_buddy_man_debug()
Di915_drm_client.c84 drm_printf(p, "drm-engine-%s:\t%llu ns\n", in show_client_class()
88 drm_printf(p, "drm-engine-capacity-%s:\t%u\n", in show_client_class()
/drivers/gpu/drm/msm/adreno/
Da5xx_debugfs.c18 drm_printf(p, "PFP state:\n"); in pfp_print()
22 drm_printf(p, " %02x: %08x\n", i, in pfp_print()
31 drm_printf(p, "ME state:\n"); in me_print()
35 drm_printf(p, " %02x: %08x\n", i, in me_print()
44 drm_printf(p, "MEQ state:\n"); in meq_print()
48 drm_printf(p, " %02x: %08x\n", i, in meq_print()
57 drm_printf(p, "ROQ state:\n"); in roq_print()
65 drm_printf(p, " %02x: %08x %08x %08x %08x\n", i, in roq_print()
Dadreno_gpu.c839 drm_printf(p, "revision: %u (%"ADRENO_CHIPID_FMT")\n", in adreno_show()
851 drm_printf(p, " - ttbr0=%.16llx\n", info->ttbr0); in adreno_show()
852 drm_printf(p, " - iova=%.16lx\n", info->iova); in adreno_show()
853 drm_printf(p, " - dir=%s\n", info->flags & IOMMU_FAULT_WRITE ? "WRITE" : "READ"); in adreno_show()
854 drm_printf(p, " - type=%s\n", info->type); in adreno_show()
855 drm_printf(p, " - source=%s\n", info->block); in adreno_show()
858 drm_printf(p, "rbbm-status: 0x%08x\n", state->rbbm_status); in adreno_show()
863 drm_printf(p, " - id: %d\n", i); in adreno_show()
864 drm_printf(p, " iova: 0x%016llx\n", state->ring[i].iova); in adreno_show()
865 drm_printf(p, " last-fence: %u\n", state->ring[i].seqno); in adreno_show()
[all …]
Da6xx_gpu_state.c1141 drm_printf(p, " - { offset: 0x%06x, value: 0x%08x }\n", in a6xx_show_registers()
1191 drm_printf(p, " - bank: %d\n", i); in a6xx_show_shader()
1192 drm_printf(p, " size: %d\n", block->size); in a6xx_show_shader()
1210 drm_printf(p, " - context: %d\n", ctx); in a6xx_show_cluster_data()
1221 drm_printf(p, " - { offset: 0x%06x, value: 0x%08x }\n", in a6xx_show_cluster_data()
1261 drm_printf(p, " dwords: %d\n", indexed->count); in a6xx_show_indexed_regs()
1276 drm_printf(p, " count: %d\n", block->count << 1); in a6xx_show_debugbus_block()
1297 drm_printf(p, " count: %d\n", VBIF_DEBUGBUS_BLOCK_SIZE); in a6xx_show_debugbus()
1320 drm_printf(p, "gpu-initialized: %d\n", a6xx_state->gpu_initialized); in a6xx_show()
1328 drm_printf(p, " iova: 0x%016llx\n", gmu_log->iova); in a6xx_show()
[all …]
/drivers/gpu/drm/i915/gt/
Dintel_gt_pm_debugfs.c349 drm_printf(p, "Requested P-state: %d\n", (rgvswctl >> 8) & 0xf); in intel_gt_pm_frequency_dump()
350 drm_printf(p, "Requested VID: %d\n", rgvswctl & 0x3f); in intel_gt_pm_frequency_dump()
351 drm_printf(p, "Current VID: %d\n", (rgvstat & MEMSTAT_VID_MASK) >> in intel_gt_pm_frequency_dump()
353 drm_printf(p, "Current P-state: %d\n", in intel_gt_pm_frequency_dump()
359 drm_printf(p, "Video Turbo Mode: %s\n", in intel_gt_pm_frequency_dump()
361 drm_printf(p, "HW control enabled: %s\n", in intel_gt_pm_frequency_dump()
363 drm_printf(p, "SW control enabled: %s\n", in intel_gt_pm_frequency_dump()
370 drm_printf(p, "PUNIT_REG_GPU_FREQ_STS: 0x%08x\n", freq_sts); in intel_gt_pm_frequency_dump()
371 drm_printf(p, "DDR freq: %d MHz\n", i915->mem_freq); in intel_gt_pm_frequency_dump()
373 drm_printf(p, "actual GPU freq: %d MHz\n", in intel_gt_pm_frequency_dump()
[all …]
Dintel_engine_cs.c2051 drm_printf(m, "*\n"); in hexdump()
2061 drm_printf(m, "[%04zx] %s\n", pos, line); in hexdump()
2087 drm_printf(m, "\tCCID: 0x%08x\n", ENGINE_READ(engine, CCID)); in intel_engine_print_registers()
2089 drm_printf(m, "\tEL_STAT_HI: 0x%08x\n", in intel_engine_print_registers()
2091 drm_printf(m, "\tEL_STAT_LO: 0x%08x\n", in intel_engine_print_registers()
2094 drm_printf(m, "\tRING_START: 0x%08x\n", in intel_engine_print_registers()
2096 drm_printf(m, "\tRING_HEAD: 0x%08x\n", in intel_engine_print_registers()
2098 drm_printf(m, "\tRING_TAIL: 0x%08x\n", in intel_engine_print_registers()
2100 drm_printf(m, "\tRING_CTL: 0x%08x%s\n", in intel_engine_print_registers()
2104 drm_printf(m, "\tRING_MODE: 0x%08x%s\n", in intel_engine_print_registers()
[all …]
Dintel_rps.c2329 drm_printf(p, "Video Turbo Mode: %s\n", in rps_frequency_dump()
2331 drm_printf(p, "HW control enabled: %s\n", in rps_frequency_dump()
2333 drm_printf(p, "SW control enabled: %s\n", in rps_frequency_dump()
2336 drm_printf(p, "PM IER=0x%08x IMR=0x%08x, MASK=0x%08x\n", in rps_frequency_dump()
2339 drm_printf(p, "PM ISR=0x%08x IIR=0x%08x\n", in rps_frequency_dump()
2341 drm_printf(p, "pm_intrmsk_mbz: 0x%08x\n", in rps_frequency_dump()
2343 drm_printf(p, "GT_PERF_STATUS: 0x%08x\n", gt_perf_status); in rps_frequency_dump()
2344 drm_printf(p, "Render p-state ratio: %d\n", in rps_frequency_dump()
2346 drm_printf(p, "Render p-state VID: %d\n", in rps_frequency_dump()
2348 drm_printf(p, "Render p-state limit: %d\n", in rps_frequency_dump()
[all …]
Dintel_sseu.c781 drm_printf(p, "subslice total: %u\n", in intel_sseu_dump()
783 drm_printf(p, "geometry dss mask=%*pb\n", in intel_sseu_dump()
786 drm_printf(p, "compute dss mask=%*pb\n", in intel_sseu_dump()
790 drm_printf(p, "slice total: %u, mask=%04x\n", in intel_sseu_dump()
792 drm_printf(p, "subslice total: %u\n", in intel_sseu_dump()
798 drm_printf(p, "slice%d: %u subslices, mask=%08x\n", in intel_sseu_dump()
803 drm_printf(p, "EU total: %u\n", sseu->eu_total); in intel_sseu_dump()
804 drm_printf(p, "EU per subslice: %u\n", sseu->eu_per_subslice); in intel_sseu_dump()
805 drm_printf(p, "has slice power gating: %s\n", in intel_sseu_dump()
807 drm_printf(p, "has subslice power gating: %s\n", in intel_sseu_dump()
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Dintel_timeline.c428 drm_printf(m, "Timeline %llx: busy; skipping\n", in intel_gt_show_timelines()
452 drm_printf(m, "Timeline %llx: { ", tl->fence_context); in intel_gt_show_timelines()
453 drm_printf(m, "count: %lu, ready: %lu, inflight: %lu", in intel_gt_show_timelines()
455 drm_printf(m, ", seqno: { current: %d, last: %d }", in intel_gt_show_timelines()
459 drm_printf(m, ", engine: %s", in intel_gt_show_timelines()
463 drm_printf(m, " }\n"); in intel_gt_show_timelines()
/drivers/gpu/drm/msm/disp/
Dmsm_disp_snapshot_util.c66 drm_printf(p, "0x%lx : %08x %08x %08x %08x\n", in msm_disp_state_print_regs()
83 drm_printf(p, "---\n"); in msm_disp_state_print()
84 drm_printf(p, "kernel: " UTS_RELEASE "\n"); in msm_disp_state_print()
85 drm_printf(p, "module: " KBUILD_MODNAME "\n"); in msm_disp_state_print()
86 drm_printf(p, "dpu devcoredump\n"); in msm_disp_state_print()
87 drm_printf(p, "time: %lld.%09ld\n", in msm_disp_state_print()
91 drm_printf(p, "====================%s================\n", block->name); in msm_disp_state_print()
95 drm_printf(p, "===================dpu drm state================\n"); in msm_disp_state_print()
/drivers/accel/ivpu/
Divpu_fw_log.c74 drm_printf(p, "%s\n", line); in buffer_print()
82 drm_printf(p, "%s\n", line); in buffer_print()
90 drm_printf(p, "%s\n", line); in buffer_print()
103 drm_printf(p, "==== %s \"%s\" log empty ====\n", prefix, log->name); in fw_log_print_buffer()
107 drm_printf(p, "==== %s \"%s\" log start ====\n", prefix, log->name); in fw_log_print_buffer()
114 drm_printf(p, "\x1b[0m"); in fw_log_print_buffer()
115 drm_printf(p, "==== %s \"%s\" log end ====\n", prefix, log->name); in fw_log_print_buffer()
/drivers/gpu/drm/loongson/
Dlsdc_gfxpll.c125 drm_printf(p, "reference clock: %u\n", parms->ref_clock); in loongson_gfxpll_print()
126 drm_printf(p, "div_ref = %u\n", parms->div_ref); in loongson_gfxpll_print()
127 drm_printf(p, "loopc = %u\n", parms->loopc); in loongson_gfxpll_print()
129 drm_printf(p, "div_out_dc = %u\n", parms->div_out_dc); in loongson_gfxpll_print()
130 drm_printf(p, "div_out_gmc = %u\n", parms->div_out_gmc); in loongson_gfxpll_print()
131 drm_printf(p, "div_out_gpu = %u\n", parms->div_out_gpu); in loongson_gfxpll_print()
136 drm_printf(p, "dc: %uMHz, gmc: %uMHz, gpu: %uMHz\n", dc, gmc, gpu); in loongson_gfxpll_print()
/drivers/gpu/drm/i915/gt/uc/
Dintel_gsc_uc.c327 drm_printf(p, "GSC not supported\n"); in intel_gsc_uc_load_status()
332 drm_printf(p, "GSC disabled\n"); in intel_gsc_uc_load_status()
336 drm_printf(p, "GSC firmware: %s\n", gsc->fw.file_selected.path); in intel_gsc_uc_load_status()
338 drm_printf(p, "GSC firmware wanted: %s\n", gsc->fw.file_wanted.path); in intel_gsc_uc_load_status()
339 drm_printf(p, "\tstatus: %s\n", intel_uc_fw_status_repr(gsc->fw.status)); in intel_gsc_uc_load_status()
341 drm_printf(p, "Release: %u.%u.%u.%u\n", in intel_gsc_uc_load_status()
345 drm_printf(p, "Compatibility Version: %u.%u [min expected %u.%u]\n", in intel_gsc_uc_load_status()
349 drm_printf(p, "SVN: %u\n", gsc->security_version); in intel_gsc_uc_load_status()
357 drm_printf(p, "HECI1 FWSTST%u = 0x%08x\n", i, status); in intel_gsc_uc_load_status()
Dintel_uc_debugfs.c23 drm_printf(&p, "[guc] supported:%s wanted:%s used:%s\n", in uc_usage_show()
27 drm_printf(&p, "[huc] supported:%s wanted:%s used:%s\n", in uc_usage_show()
31 drm_printf(&p, "[submission] supported:%s wanted:%s used:%s\n", in uc_usage_show()
Dintel_guc.c374 drm_printf(p, "Kernel timestamp: 0x%08llX [%llu]\n", ktime, ktime); in intel_guc_dump_time_info()
375 drm_printf(p, "GuC timestamp: 0x%08X [%u]\n", stamp, stamp); in intel_guc_dump_time_info()
376 drm_printf(p, "CS timestamp frequency: %u Hz, %u ns\n", in intel_guc_dump_time_info()
860 drm_printf(p, "GuC not supported\n"); in intel_guc_load_status()
865 drm_printf(p, "GuC disabled\n"); in intel_guc_load_status()
875 drm_printf(p, "GuC status 0x%08x:\n", status); in intel_guc_load_status()
876 drm_printf(p, "\tBootrom status = 0x%x\n", in intel_guc_load_status()
878 drm_printf(p, "\tuKernel status = 0x%x\n", in intel_guc_load_status()
880 drm_printf(p, "\tMIA Core status = 0x%x\n", in intel_guc_load_status()
884 drm_printf(p, "\t%2d: \t0x%x\n", in intel_guc_load_status()
/drivers/gpu/drm/
Ddrm_atomic.c445 drm_printf(p, "crtc[%u]: %s\n", crtc->base.id, crtc->name); in drm_atomic_crtc_print_state()
446 drm_printf(p, "\tenable=%d\n", state->enable); in drm_atomic_crtc_print_state()
447 drm_printf(p, "\tactive=%d\n", state->active); in drm_atomic_crtc_print_state()
448 drm_printf(p, "\tself_refresh_active=%d\n", state->self_refresh_active); in drm_atomic_crtc_print_state()
449 drm_printf(p, "\tplanes_changed=%d\n", state->planes_changed); in drm_atomic_crtc_print_state()
450 drm_printf(p, "\tmode_changed=%d\n", state->mode_changed); in drm_atomic_crtc_print_state()
451 drm_printf(p, "\tactive_changed=%d\n", state->active_changed); in drm_atomic_crtc_print_state()
452 drm_printf(p, "\tconnectors_changed=%d\n", state->connectors_changed); in drm_atomic_crtc_print_state()
453 drm_printf(p, "\tcolor_mgmt_changed=%d\n", state->color_mgmt_changed); in drm_atomic_crtc_print_state()
454 drm_printf(p, "\tplane_mask=%x\n", state->plane_mask); in drm_atomic_crtc_print_state()
[all …]
Ddrm_print.c211 drm_printf(p, "%s", str); in drm_puts()
220 void drm_printf(struct drm_printer *p, const char *f, ...) in drm_printf() function
228 EXPORT_SYMBOL(drm_printf);
252 drm_printf(p, "%s%s", first ? "" : ",", in drm_print_bits()
257 drm_printf(p, "(none)"); in drm_print_bits()
363 drm_printf(p, "%*s = 0x%08x\n", in drm_print_regset32()
/drivers/gpu/drm/i915/pxp/
Dintel_pxp_debugfs.c27 drm_printf(&p, "pxp disabled\n"); in pxp_info_show()
31 drm_printf(&p, "active: %s\n", str_yes_no(intel_pxp_is_active(pxp))); in pxp_info_show()
32 drm_printf(&p, "instance counter: %u\n", pxp->key_instance); in pxp_info_show()
/drivers/gpu/drm/i915/selftests/
Di915_active.c281 drm_printf(m, "active %ps:%ps\n", ref->active, ref->retire); in i915_active_print()
282 drm_printf(m, "\tcount: %d\n", atomic_read(&ref->count)); in i915_active_print()
283 drm_printf(m, "\tpreallocated barriers? %s\n", in i915_active_print()
294 drm_printf(m, "\tbarrier: %s\n", engine->name); in i915_active_print()
299 drm_printf(m, in i915_active_print()
/drivers/gpu/drm/msm/disp/mdp5/
Dmdp5_smp.c336 drm_printf(p, "name\tinuse\tplane\n"); in mdp5_smp_dump()
337 drm_printf(p, "----\t-----\t-----\n"); in mdp5_smp_dump()
357 drm_printf(p, "%s:%d\t%d\t%s\n", in mdp5_smp_dump()
365 drm_printf(p, "TOTAL:\t%d\t(of %d)\n", total, smp->blk_cnt); in mdp5_smp_dump()
366 drm_printf(p, "AVAIL:\t%d\n", smp->blk_cnt - in mdp5_smp_dump()
/drivers/gpu/drm/msm/
Dmsm_gpu.c154 drm_printf(p, "drm-engine-gpu:\t%llu ns\n", ctx->elapsed_ns); in msm_gpu_show_fdinfo()
155 drm_printf(p, "drm-cycles-gpu:\t%llu\n", ctx->cycles); in msm_gpu_show_fdinfo()
156 drm_printf(p, "drm-maxfreq-gpu:\t%u Hz\n", gpu->fast_rate); in msm_gpu_show_fdinfo()
197 drm_printf(&p, "---\n"); in msm_gpu_devcoredump_read()
198 drm_printf(&p, "kernel: " UTS_RELEASE "\n"); in msm_gpu_devcoredump_read()
199 drm_printf(&p, "module: " KBUILD_MODNAME "\n"); in msm_gpu_devcoredump_read()
200 drm_printf(&p, "time: %lld.%09ld\n", in msm_gpu_devcoredump_read()
203 drm_printf(&p, "comm: %s\n", state->comm); in msm_gpu_devcoredump_read()
205 drm_printf(&p, "cmdline: %s\n", state->cmd); in msm_gpu_devcoredump_read()

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