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Searched refs:dsaf_set_dev_bit (Results 1 – 6 of 6) sorted by relevance

/drivers/net/ethernet/hisilicon/hns/
Dhns_dsaf_gmac.c67 dsaf_set_dev_bit(drv, GMAC_PORT_EN_REG, GMAC_PORT_TX_EN_B, 1); in hns_gmac_enable()
71 dsaf_set_dev_bit(drv, GMAC_PCS_RX_EN_REG, 0, 0); in hns_gmac_enable()
72 dsaf_set_dev_bit(drv, GMAC_PORT_EN_REG, GMAC_PORT_RX_EN_B, 1); in hns_gmac_enable()
82 dsaf_set_dev_bit(drv, GMAC_PORT_EN_REG, GMAC_PORT_TX_EN_B, 0); in hns_gmac_disable()
86 dsaf_set_dev_bit(drv, GMAC_PCS_RX_EN_REG, 0, 1); in hns_gmac_disable()
87 dsaf_set_dev_bit(drv, GMAC_PORT_EN_REG, GMAC_PORT_RX_EN_B, 0); in hns_gmac_disable()
159 dsaf_set_dev_bit(drv, GMAC_TRANSMIT_CONTROL_REG, in hns_gmac_config_an_mode()
261 dsaf_set_dev_bit(drv, GMAC_DUPLEX_TYPE_REG, in hns_gmac_adjust_link()
294 dsaf_set_dev_bit(drv, GMAC_REC_FILT_CONTROL_REG, in hns_gmac_set_uc_match()
296 dsaf_set_dev_bit(drv, GMAC_STATION_ADDR_HIGH_2_REG, in hns_gmac_set_uc_match()
[all …]
Dhns_dsaf_ppe.c17 dsaf_set_dev_bit(ppe_cb, PPEV2_CFG_TSO_EN_REG, 0, !!value); in hns_ppe_set_tso_enable()
132 dsaf_set_dev_bit(ppe_cb, PPE_TNL_0_5_CNT_CLR_CE_REG, in hns_ppe_cnt_clr_ce()
247 dsaf_set_dev_bit(ppe_common, PPE_COM_COMMON_CNT_CLR_CE_REG, in hns_ppe_common_init_hw()
Dhns_dsaf_main.c214 dsaf_set_dev_bit(dsaf_dev, DSAF_CFG_0_REG, DSAF_CFG_SBM_INIT_S, 1); in hns_dsaf_sbm_link_sram_init_en()
225 dsaf_set_dev_bit(dsaf_dev, DSAF_DSA_REG_CNT_CLR_CE_REG, in hns_dsaf_reg_cnt_clr_ce()
357 dsaf_set_dev_bit(dsaf_dev, reg, DSAF_SBM_CFG_MIB_EN_S, 0); in hns_dsaf_sbm_cfg_mib_en()
362 dsaf_set_dev_bit(dsaf_dev, reg, DSAF_SBM_CFG_MIB_EN_S, 1); in hns_dsaf_sbm_cfg_mib_en()
765 dsaf_set_dev_bit(dsaf_dev, DSAF_CFG_0_REG, in hns_dsaf_set_promisc_mode()
792 dsaf_set_dev_bit(dsaf_dev, DSAF_XGE_CTRL_SIG_CFG_0_REG, in hns_dsaf_rocee_bp_en()
1182 dsaf_set_dev_bit(dsaf_dev, DSAF_PAUSE_CFG_REG + mac_id * 4, in hns_dsaf_set_pfc_pause()
1184 dsaf_set_dev_bit(dsaf_dev, DSAF_PAUSE_CFG_REG + mac_id * 4, in hns_dsaf_set_pfc_pause()
1198 dsaf_set_dev_bit(dsaf_dev, DSAF_PAUSE_CFG_REG + mac_id * 4, in hns_dsaf_set_rx_mac_pause_en()
Dhns_dsaf_rcb.c402 dsaf_set_dev_bit(rcb_common, RCBV2_COM_CFG_USER_REG, in hns_rcb_common_init_hw()
404 dsaf_set_dev_bit(rcb_common, RCBV2_COM_CFG_USER_REG, in hns_rcb_common_init_hw()
406 dsaf_set_dev_bit(rcb_common, RCBV2_COM_CFG_TSO_MODE_REG, in hns_rcb_common_init_hw()
Dhns_dsaf_xgmac.c93 dsaf_set_dev_bit(drv, XGMAC_MAC_ENABLE_REG, XGMAC_ENABLE_TX_B, !!value); in hns_xgmac_tx_enable()
103 dsaf_set_dev_bit(drv, XGMAC_MAC_ENABLE_REG, XGMAC_ENABLE_RX_B, !!value); in hns_xgmac_rx_enable()
278 dsaf_set_dev_bit(drv, XGMAC_MAC_PAUSE_CTRL_REG, in hns_xgmac_set_tx_auto_pause_frames()
Dhns_dsaf_reg.h1064 #define dsaf_set_dev_bit(dev, reg, bit, val) \ macro