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Searched refs:dw_selectors (Results 1 – 5 of 5) sorted by relevance

/drivers/net/ethernet/mellanox/mlx5/core/steering/
Ddr_definer.c10 u8 dw_selectors[MLX5_IFC_DEFINER_DW_SELECTORS_NUM]; member
17 u16 format_id, u8 *dw_selectors, in dr_definer_compare() argument
26 if (definer->dw_selectors[i] != dw_selectors[i]) in dr_definer_compare()
41 u8 *dw_selectors, u8 *byte_selectors, u8 *match_mask) in dr_definer_find_obj() argument
48 dw_selectors, byte_selectors, in dr_definer_find_obj()
58 u8 *dw_selectors, u8 *byte_selectors, u8 *match_mask) in dr_definer_create_obj() argument
69 dw_selectors, in dr_definer_create_obj()
85 memcpy(definer_obj->dw_selectors, dw_selectors, sizeof(definer_obj->dw_selectors)); in dr_definer_create_obj()
116 u8 *dw_selectors, u8 *byte_selectors, in mlx5dr_definer_get() argument
122 definer_obj = dr_definer_find_obj(dmn, format_id, dw_selectors, in mlx5dr_definer_get()
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Ddr_cmd.c590 u8 *dw_selectors, in dr_cmd_set_definer_format() argument
596 MLX5_SET(match_definer, ptr, format_select_dw0, dw_selectors[0]); in dr_cmd_set_definer_format()
597 MLX5_SET(match_definer, ptr, format_select_dw1, dw_selectors[1]); in dr_cmd_set_definer_format()
598 MLX5_SET(match_definer, ptr, format_select_dw2, dw_selectors[2]); in dr_cmd_set_definer_format()
599 MLX5_SET(match_definer, ptr, format_select_dw3, dw_selectors[3]); in dr_cmd_set_definer_format()
600 MLX5_SET(match_definer, ptr, format_select_dw4, dw_selectors[4]); in dr_cmd_set_definer_format()
601 MLX5_SET(match_definer, ptr, format_select_dw5, dw_selectors[5]); in dr_cmd_set_definer_format()
602 MLX5_SET(match_definer, ptr, format_select_dw6, dw_selectors[6]); in dr_cmd_set_definer_format()
603 MLX5_SET(match_definer, ptr, format_select_dw7, dw_selectors[7]); in dr_cmd_set_definer_format()
604 MLX5_SET(match_definer, ptr, format_select_dw8, dw_selectors[8]); in dr_cmd_set_definer_format()
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Dmlx5dr.h157 u8 *dw_selectors, u8 *byte_selectors,
Ddr_action.c1050 u8 *dw_selectors, in dr_action_range_definer_fill() argument
1058 dw_selectors[0] = MLX5_IFC_DEFINER_FORMAT_OFFSET_OUTER_ETH_PKT_LEN / 4; in dr_action_range_definer_fill()
1061 dw_selectors[i] = MLX5_IFC_DEFINER_FORMAT_OFFSET_UNUSED; in dr_action_range_definer_fill()
1074 u8 dw_selectors[MLX5_IFC_DEFINER_DW_SELECTORS_NUM] = {}; in dr_action_create_range_definer() local
1081 dw_selectors, in dr_action_create_range_definer()
1086 dw_selectors, byte_selectors, in dr_action_create_range_definer()
Ddr_types.h1363 u8 *dw_selectors,