| /drivers/gpu/drm/amd/display/include/ |
| D | bios_parser_types.h | 113 enum engine_id engine_id; member
124 enum engine_id engine_id; member
136 enum engine_id engine_id; member
148 enum engine_id engine_id; member
156 enum engine_id hpo_engine_id; /* used for DCN3 */
|
| D | grph_object_id.h | 177 enum engine_id { enum
295 static inline enum engine_id dal_graphics_object_id_get_engine_id( in dal_graphics_object_id_get_engine_id()
299 return (enum engine_id) id.id; in dal_graphics_object_id_get_engine_id()
|
| D | audio_types.h | 93 enum engine_id engine_id; member
|
| /drivers/gpu/drm/nouveau/nvkm/falcon/ |
| D | ga100.c | 32 FLCN_DBG(falcon, "brom: %08x %08x", fw->engine_id, fw->ucode_id); in ga100_flcn_fw_signature()
35 if (fw->engine_id & 0x00000001) { in ga100_flcn_fw_signature()
38 if (fw->engine_id & 0x00000004) { in ga100_flcn_fw_signature()
41 if (fw->engine_id & 0x00000400) { in ga100_flcn_fw_signature()
|
| /drivers/gpu/drm/amd/display/dc/bios/ |
| D | command_table_helper_struct.h | 40 bool (*engine_bp_to_atom)(enum engine_id engine_id,
57 uint8_t (*dig_encoder_sel_to_atom)(enum engine_id engine_id);
|
| /drivers/gpu/drm/amd/display/dc/dce/ |
| D | dce_i2c_hw.c | 330 DC_I2C_DDC_SELECT, dce_i2c_hw->engine_id); in setup_engine()
619 uint32_t engine_id, in dce_i2c_hw_construct() argument
625 dce_i2c_hw->engine_id = engine_id; in dce_i2c_hw_construct()
642 uint32_t engine_id, in dce100_i2c_hw_construct() argument
649 engine_id, in dce100_i2c_hw_construct()
659 uint32_t engine_id, in dce112_i2c_hw_construct() argument
666 engine_id, in dce112_i2c_hw_construct()
676 uint32_t engine_id, in dcn1_i2c_hw_construct() argument
683 engine_id, in dcn1_i2c_hw_construct()
693 uint32_t engine_id, in dcn2_i2c_hw_construct() argument
[all …]
|
| D | dce_i2c_hw.h | 284 uint32_t engine_id; member
298 uint32_t engine_id,
306 uint32_t engine_id,
314 uint32_t engine_id,
322 uint32_t engine_id,
330 uint32_t engine_id,
|
| D | dce_link_encoder.c | 239 enum engine_id result; in dce110_get_dig_frontend()
574 enum engine_id engine) in get_frontend_source()
965 cntl.engine_id = ENGINE_ID_UNKNOWN; in dce110_link_encoder_hw_init()
1060 cntl.engine_id = enc->preferred_engine; in dce110_link_encoder_enable_tmds_output()
1096 cntl.engine_id = enc->preferred_engine; in dce110_link_encoder_enable_lvds_output()
1134 cntl.engine_id = enc->preferred_engine; in dce110_link_encoder_enable_dp_output()
1173 cntl.engine_id = ENGINE_ID_UNKNOWN; in dce110_link_encoder_enable_dp_mst_output()
1213 cntl.engine_id = enc->preferred_engine; in dce60_link_encoder_enable_dp_output()
1252 cntl.engine_id = ENGINE_ID_UNKNOWN; in dce60_link_encoder_enable_dp_mst_output()
1619 enum engine_id engine, in dce110_link_encoder_connect_dig_be_to_fe()
|
| /drivers/gpu/drm/amd/display/dc/core/ |
| D | dc_link_enc_cfg.c | 82 enum engine_id eng_id) in get_stream_using_link_enc()
102 enum engine_id eng_id) in remove_link_enc_assignment()
137 enum engine_id eng_id) in add_link_enc_assignment()
170 static enum engine_id find_first_avail_link_enc( in find_first_avail_link_enc()
173 enum engine_id eng_id_requested) in find_first_avail_link_enc()
175 enum engine_id eng_id = ENGINE_ID_UNKNOWN; in find_first_avail_link_enc()
199 static bool is_avail_link_enc(struct dc_state *state, enum engine_id eng_id, struct dc_stream_state… in is_avail_link_enc()
274 state->res_ctx.link_enc_cfg_ctx.link_enc_avail[i] = (enum engine_id) i; in clear_enc_assignments()
302 enum engine_id eng_id = ENGINE_ID_UNKNOWN, eng_id_req = ENGINE_ID_UNKNOWN; in link_enc_cfg_link_encs_assign()
450 enum engine_id eng_id = ENGINE_ID_UNKNOWN; in link_enc_cfg_link_enc_unassign()
[all …]
|
| /drivers/gpu/drm/amd/display/dc/inc/ |
| D | link_enc_cfg.h | 84 enum engine_id eng_id);
89 enum engine_id eng_id);
113 bool link_enc_cfg_is_link_enc_avail(struct dc *dc, enum engine_id eng_id, struct dc_link *link);
|
| D | core_types.h | 68 enum engine_id (*get_preferred_eng_id_dpia)(unsigned int dpia_index);
78 struct link_encoder *(*link_enc_create_minimal)(struct dc_context *ctx, enum engine_id eng_id);
421 enum engine_id link_enc_avail[MAX_DIG_LINK_ENCODERS];
560 enum engine_id digfe_inst;
|
| /drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_amdkfd_arcturus.c | 69 unsigned int engine_id, in get_sdma_rlc_reg_offset() argument
75 switch (engine_id) { in get_sdma_rlc_reg_offset()
79 engine_id); in get_sdma_rlc_reg_offset()
118 pr_debug("RLC register offset for SDMA%d RLC%d: 0x%x\n", engine_id, in get_sdma_rlc_reg_offset()
194 uint32_t engine_id, uint32_t queue_id, in kgd_arcturus_hqd_sdma_dump() argument
198 engine_id, queue_id); in kgd_arcturus_hqd_sdma_dump()
|
| D | amdgpu_amdkfd_gfx_v10_3.c | 130 unsigned int engine_id, in get_sdma_rlc_reg_offset() argument
136 switch (engine_id) { in get_sdma_rlc_reg_offset()
140 engine_id); in get_sdma_rlc_reg_offset()
163 pr_debug("RLC register offset for SDMA%d RLC%d: 0x%x\n", engine_id, in get_sdma_rlc_reg_offset()
429 uint32_t engine_id, uint32_t queue_id, in hqd_sdma_dump_v10_3() argument
433 engine_id, queue_id); in hqd_sdma_dump_v10_3()
|
| D | amdgpu_amdkfd_gc_9_4_3.c | 44 unsigned int engine_id, in get_sdma_rlc_reg_offset() argument
48 SOC15_REG_OFFSET(SDMA0, GET_INST(SDMA0, engine_id), in get_sdma_rlc_reg_offset()
54 pr_debug("RLC register offset for SDMA%d RLC%d: 0x%x\n", engine_id, in get_sdma_rlc_reg_offset()
129 uint32_t engine_id, uint32_t queue_id, in kgd_gfx_v9_4_3_hqd_sdma_dump() argument
133 engine_id, queue_id); in kgd_gfx_v9_4_3_hqd_sdma_dump()
|
| D | amdgpu_amdkfd_gfx_v11.c | 126 unsigned int engine_id, in get_sdma_rlc_reg_offset() argument
132 switch (engine_id) { in get_sdma_rlc_reg_offset()
148 pr_debug("RLC register offset for SDMA%d RLC%d: 0x%x\n", engine_id, in get_sdma_rlc_reg_offset()
414 uint32_t engine_id, uint32_t queue_id, in hqd_sdma_dump_v11() argument
418 engine_id, queue_id); in hqd_sdma_dump_v11()
|
| /drivers/gpu/drm/amd/display/dc/inc/hw/ |
| D | link_encoder.h | 85 enum engine_id preferred_engine;
144 enum engine_id engine,
184 enum engine_id eng_id;
231 enum engine_id preferred_engine;
|
| /drivers/gpu/drm/amd/display/dc/bios/dce110/ |
| D | command_table_helper_dce110.c | 154 static uint8_t dig_encoder_sel_to_atom(enum engine_id id) in dig_encoder_sel_to_atom()
210 static bool engine_bp_to_atom(enum engine_id id, uint32_t *atom_engine_id) in engine_bp_to_atom()
|
| /drivers/gpu/drm/amd/display/dc/dcn10/ |
| D | dcn10_link_encoder.c | 424 enum engine_id engine) in get_frontend_source()
451 enum engine_id result; in dcn10_get_dig_frontend()
836 cntl.engine_id = ENGINE_ID_UNKNOWN; in dcn10_link_encoder_hw_init()
932 cntl.engine_id = enc->preferred_engine; in dcn10_link_encoder_enable_tmds_output()
989 cntl.engine_id = enc->preferred_engine; in dcn10_link_encoder_enable_dp_output()
1028 cntl.engine_id = ENGINE_ID_UNKNOWN; in dcn10_link_encoder_enable_dp_mst_output()
1340 enum engine_id engine, in dcn10_link_encoder_connect_dig_be_to_fe()
|
| /drivers/gpu/drm/amd/display/dc/bios/dce112/ |
| D | command_table_helper2_dce112.c | 151 static uint8_t dig_encoder_sel_to_atom(enum engine_id id) in dig_encoder_sel_to_atom()
212 static bool engine_bp_to_atom(enum engine_id id, uint32_t *atom_engine_id) in engine_bp_to_atom()
|
| D | command_table_helper_dce112.c | 151 static uint8_t dig_encoder_sel_to_atom(enum engine_id id) in dig_encoder_sel_to_atom()
212 static bool engine_bp_to_atom(enum engine_id id, uint32_t *atom_engine_id) in engine_bp_to_atom()
|
| /drivers/gpu/drm/amd/display/dc/bios/dce80/ |
| D | command_table_helper_dce80.c | 61 static bool engine_bp_to_atom(enum engine_id id, uint32_t *atom_engine_id) in engine_bp_to_atom()
239 static uint8_t dig_encoder_sel_to_atom(enum engine_id id) in dig_encoder_sel_to_atom()
|
| /drivers/gpu/drm/amd/display/dc/bios/dce60/ |
| D | command_table_helper_dce60.c | 61 static bool engine_bp_to_atom(enum engine_id id, uint32_t *atom_engine_id) in engine_bp_to_atom()
239 static uint8_t dig_encoder_sel_to_atom(enum engine_id id) in dig_encoder_sel_to_atom()
|
| /drivers/gpu/drm/amd/display/dc/dcn32/ |
| D | dcn32_dio_stream_encoder.c | 74 cntl.engine_id = enc1->base.id; in enc32_stream_encoder_dvi_set_stream_attribute()
115 cntl.engine_id = enc1->base.id; in enc32_stream_encoder_hdmi_set_stream_attribute()
509 enum engine_id eng_id, in dcn32_dio_stream_encoder_construct()
|
| /drivers/gpu/drm/amd/display/dc/dcn314/ |
| D | dcn314_dio_stream_encoder.c | 107 cntl.engine_id = enc1->base.id; in enc314_stream_encoder_dvi_set_stream_attribute()
148 cntl.engine_id = enc1->base.id; in enc314_stream_encoder_hdmi_set_stream_attribute()
478 enum engine_id eng_id, in dcn314_dio_stream_encoder_construct()
|
| /drivers/gpu/drm/nouveau/nvkm/subdev/acr/ |
| D | ga102.c | 107 .engine_id = lsfw->engine_id, in ga102_acr_wpr_build_lsb()
118 hdr->hs_fmc_params.engid_mask = lsfw->engine_id; in ga102_acr_wpr_build_lsb()
|