Searched refs:first_prio (Results 1 – 10 of 10) sorted by relevance
| /drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/ |
| D | vlan_mangle.c | 39 match_prio_mask = MLX5_GET(fte_match_set_lyr_2_4, headers_c, first_prio); in mlx5e_tc_act_vlan_add_rewrite_action()
40 match_prio_val = MLX5_GET(fte_match_set_lyr_2_4, headers_v, first_prio); in mlx5e_tc_act_vlan_add_rewrite_action()
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| D | vlan.c | 20 first_prio) & in add_vlan_prio_tag_rewrite_action()
24 first_prio), in add_vlan_prio_tag_rewrite_action()
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| /drivers/net/ethernet/mellanox/mlx5/core/diag/ |
| D | fs_tracepoint.c | 146 PRINT_MASKED_VAL_L2(u8, first_prio, first_prio, p, "%x"); in print_lyr_2_4_hdrs()
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| /drivers/net/ethernet/mellanox/mlx5/core/steering/ |
| D | dr_ste_v0.c | 723 DR_STE_SET_TAG(eth_l2_src_dst, bit_mask, first_priority, mask, first_prio); in dr_ste_v0_build_eth_l2_src_dst_bit_mask()
768 DR_STE_SET_TAG(eth_l2_src_dst, tag, first_priority, spec, first_prio); in dr_ste_v0_build_eth_l2_src_dst_tag()
889 DR_STE_SET_TAG(eth_l2_src, bit_mask, first_priority, mask, first_prio); in dr_ste_v0_build_eth_l2_src_or_dst_bit_mask()
940 DR_STE_SET_TAG(eth_l2_src, tag, first_priority, spec, first_prio); in dr_ste_v0_build_eth_l2_src_or_dst_tag()
1075 DR_STE_SET_TAG(eth_l2_tnl, bit_mask, first_priority, mask, first_prio); in dr_ste_v0_build_eth_l2_tnl_bit_mask()
1106 DR_STE_SET_TAG(eth_l2_tnl, tag, first_priority, spec, first_prio); in dr_ste_v0_build_eth_l2_tnl_tag()
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| D | dr_ste_v1.c | 1114 DR_STE_SET_TAG(eth_l2_src_dst_v1, bit_mask, first_priority, mask, first_prio); in dr_ste_v1_build_eth_l2_src_dst_bit_mask()
1150 DR_STE_SET_TAG(eth_l2_src_dst_v1, tag, first_priority, spec, first_prio); in dr_ste_v1_build_eth_l2_src_dst_tag()
1263 DR_STE_SET_TAG(eth_l2_src_v1, bit_mask, first_priority, mask, first_prio); in dr_ste_v1_build_eth_l2_src_or_dst_bit_mask()
1313 DR_STE_SET_TAG(eth_l2_src_v1, tag, first_priority, spec, first_prio); in dr_ste_v1_build_eth_l2_src_or_dst_tag()
1439 DR_STE_SET_TAG(eth_l2_tnl_v1, bit_mask, first_priority, mask, first_prio); in dr_ste_v1_build_eth_l2_tnl_bit_mask()
1469 DR_STE_SET_TAG(eth_l2_tnl_v1, tag, first_priority, spec, first_prio); in dr_ste_v1_build_eth_l2_tnl_tag()
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| D | dr_ste.c | 870 spec->first_prio = IFC_GET_CLR(fte_match_set_lyr_2_4, mask, first_prio, clr); in dr_ste_copy_mask_spec()
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| D | dr_matcher.c | 56 (_spec).first_cfi || (_spec).first_prio || (_spec).cvlan_tag || \
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| D | dr_types.h | 543 u32 first_prio:3; member
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| /drivers/net/ethernet/mellanox/mlx5/core/ |
| D | en_tc.c | 1021 prio_mask = MLX5_GET(fte_match_set_lyr_2_4, headers_c, first_prio); in mlx5e_hairpin_get_prio()
1022 prio_val = MLX5_GET(fte_match_set_lyr_2_4, headers_v, first_prio); in mlx5e_hairpin_get_prio()
2707 MLX5_SET(fte_match_set_lyr_2_4, headers_c, first_prio, in __parse_cls_flower()
2709 MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio, in __parse_cls_flower()
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| /drivers/infiniband/hw/mlx5/ |
| D | fs.c | 259 first_prio, in parse_flow_attr()
262 first_prio, in parse_flow_attr()
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